Integrated circuit package and method for fabricating same
View Patent ↗A process for fabricating an integrated circuit package includes: selectively etching a first side of a substrate thereby providing etched regions of the substrate to partially define at least a plurality of contact pads; adding a dielectric material to the etched regions of the substrate; selectively etching a second side of the substrate to further define at least the plurality of contact pads and thereby provide a package base of at least the contact pads and the dielectric; mounting a semiconductor die to the package base and connecting the semiconductor die to the contact pads; fixing a lid to the package base to cover the semiconductor die in a cavity between the lid and the package base; and singulating to provide the integrated circuit package.
1. An integrated circuit package comprising:
a package base comprising a non-conductive material and a plurality of contact pads extending through and protruding from said non-conductive material;
a semiconductor die mounted to said package base and electrically connected to various ones of said contact pads;
a barrier material fixed to said non-conductive material on a same side of said base as said semiconductor die, and
a lid fixed to said package base and covering said semiconductor die in a cavity between said lid and said package base.
2. The integrated circuit package according to claim 1 , wherein said non-conductive material comprises a polymer.
3. The integrated circuit package according to claim 1 , wherein said barrier material comprises a liquid crystal polymer.
4. The integrated circuit package according to claim 1 , wherein said barrier material comprises a soldermask.
5. The integrated circuit package according to claim 1 , wherein said package base further comprises a die attach pad and said semiconductor die is mounted to said die attach pad.
6. The integrated circuit package according to claim 5 , wherein said semiconductor die is electrically connected to said contact pads via a plurality of wire bonds.
7. The integrated circuit package according to claim 5 , wherein said die attach pad protrudes from said non-conductive material.
8. The integrated circuit package according to claim 7 , wherein said semiconductor die is fixed to said die attach pad on a side of said die attach pad that protrudes from said non-conductive material.
9. The integrated circuit package according to claim 7 , wherein said semiconductor die is fixed to said die attach pad, on a side opposite the portion of said die attach pad that protrudes from said non-conductive material.