Method and system for testing network device logic
View Patent ↗Method and system for testing a network device is provided. The system includes, a test program running on a host system that communicates with the network device through a bus functional module; and a test module that includes a packet counter that counts test packets that are received from a buffer and written in a memory of the test module; and an idle timer that counts time that has expired after a last test packet has been received by the memory module of the test module; wherein if the packet counter value exceeds a threshold value then all test packets residing in the memory of the test module are sent for testing network device logic and if the idle timer expires at any given instance, then all the test packets in the memory of the test module are sent for testing network device logic.
1. A test module for testing PCI Express device logic, wherein the test module is placed between a PCI Express Port Logic and PCI Express Transaction Handler (“PTH”) comprising:
a packet counter that counts test packets that are received from a buffer in the PCI Express port logic and written in a memory of the test module; and an idle timer that counts time that has expired after a last test packet has been received by the memory module of the test module; wherein if the packet counter value exceeds a threshold value then all test packets residing in the memory of the test module are sent to the PTH for testing and if the idle timer expires at any given instance, then all the test packets in the memory of the test module are sent to the PTH.
2. The test module of claim 1 , wherein a write control logic controls what is written in the memory of the test module.
3. The test module of claim 1 , wherein a read control logic controls what is read from the memory of the test module based on whether a packet counter value and/or idle timer expiration.
4. The test module of claim 1 , wherein the PCI Express device is a host bus adapter.
5. A method for testing PCI Express device logic, comprising:
receiving test packets from a PCI Express port logic;
writing test packets in a memory module of a test module that is placed between the PCI Express Port Logic and a PCI Express Transaction Handler (PTH);
incrementing a counter when a packet is written in the memory module;
resetting an idle timer when a packet is written in the memory module; and
unloading test packets from the memory module and sending the test packets to the PTH, if the counter value exceeds a certain threshold value and/or the idle timer has expired.
6. The method of claim 5 , wherein a write control logic controls what is written in the memory module of the test module.
7. The method of claim 5 , wherein a read control logic controls what is read from the memory module of the test module based on whether a counter value has exceeded a threshold value and/or if the idle timer has expired.
8. The test module of claim 5 , wherein the PCI Express device is a host bus adapter.
9. A system for testing a PCI Express device logic with a PCI Express Port Logic and a PCI Express Transaction Handler (“PTH”) comprising:
a test program running on a host system that communicates with the PCI Express device through a bus functional module; and
a test module that is placed between the PCI Express Port logic and the PTH and includes a packet counter that counts test packets that are received from a buffer in the PCI Express port logic and written in a memory of the test module;
and an idle timer that counts time that has expired after a last test packet has been received by the memory module of the test module; wherein if the packet counter value exceeds a threshold value then all test packets residing in the memory of the test module are sent to the PTH for testing and if the idle timer expires at any given instance, then all the test packets in the memory of the test module are sent to the PTH.
10. The system of claim 9 , wherein a write control logic controls what is written in the memory of the test module.
11. The system of claim 9 , wherein a read control logic controls what is read from the memory of the test module based on whether a packet counter value and/or idle timer expiration.
12. The system of claim 9 , wherein the PCI Express device is a host bus adapter.
13. A test module for testing a network device, comprising:
a packet counter that counts test packets that are received from a buffer and written in a memory of the test module; and
an idle timer that counts time that has expired after a last test packet has been received by the memory module of the test module; wherein if the packet counter value exceeds a threshold value then all test packets residing in the memory of the test module are sent for testing and if the idle timer expires at any given instance, then all the test packets in the memory of the test module are sent out for testing.
14. The test module of claim 13 , wherein a write control logic controls what is written in the memory of the test module.
15. The test module of claim 13 , wherein a read control logic controls what is read from the memory of the test module based on whether a packet counter value and/or idle timer expiration.
16. The test module of claim 13 , wherein the network device is a host bus adapter.
17. The test module of 13 , wherein the network device is a PCI Express device and/or a non-PCI Express device.
18. A method for testing a network device logic, comprising:
receiving test packets;
writing test packets in a memory module of a test module;
incrementing a counter when a packet is written in the memory module;
resetting an idle timer when a packet is written in the memory module; and
unloading test packets from the memory module and sending the test packets, if the counter value exceeds a certain threshold value and/or the idle timer has expired.
19. The method of claim 18 , wherein a write control logic controls what is written in the memory module of the test module.
20. The method of claim 18 , wherein a read control logic controls what is read from the memory module of the test module based on whether a counter value has exceed a threshold value and/or if the idle timer has expired.
21. A system for testing a network device comprising:
a test program running on a host system that communicates with the network device through a bus functional module; and
a test module that includes a packet counter that counts test packets that are received from a buffer and written in a memory of the test module; and an idle timer that counts time that has expired after a last test packet has been received by the memory module of the test module; wherein if the packet counter value exceeds a threshold value then all test packets residing in the memory of the test module are sent for testing network device logic and if the idle timer expires at any given instance, then all the test packets in the memory of the test module are sent for testing network device logic.
22. The system of claim 21 , wherein a write control logic controls what is written in the memory of the test module.
23. The system of claim 9 , wherein a read control logic controls what is read from the memory of the test module based on whether a packet counter value and/or idle timer expiration.