IP Library Granted Patent US 7,485,968
Granted Patent B2
US 7,485,968 · App. 11/201,321 · Granted Feb 3, 2009

3D IC method and device

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Quick Facts
Patent No.
US 7,485,968
App. No.
11/201,321
Granted
Feb 3, 2009
Kind
B2
Abstract

A method of three-dimensionally integrating elements such as singulated die or wafers and an integrated structure having connected elements such as singulated dies or wafers. Either or both of the die and wafer may have semiconductor devices formed therein. A first element having a first contact structure is bonded to a second element having a second contact structure. First and second contact structures can be exposed at bonding and electrically interconnected as a result of the bonding. A via may be etched and filled after bonding to expose and form an electrical interconnect to interconnected first and second contact structures and provide electrical access to this interconnect from a surface. Alternatively, first and/or second contact structures are not exposed at bonding, and a via is etched and filled after bonding to electrically interconnect first and second contact structures and provide electrical access to interconnected first and second contact structure to a surface. Also, a device may be formed in a first substrate, the device being disposed in a device region of the first substrate and having a first contact structure. A via may be etched, or etched and filled, through the device region and into the first substrate before bonding and the first substrate thinned to expose the via, or filled via after bonding.

Claims (78)

1. A structure, comprising:

a first element having a first substrate, a first insulating layer disposed on said first substrate containing silicon and at least one of oxygen and nitrogen, and a first contact structure disposed in said first insulating layer;

a second element having a second substrate, a second insulating layer disposed on said second substrate containing silicon and at least one of oxygen and nitrogen, and a second contact structure disposed in said second insulating layer;

said first insulating layer directly bonded to said second insulating layer;

said first contact structure directly connected to said second contact structure; and

an interconnect structure disposed in a via and connected to said first contact structure.

2. A structure as recited in claim 1 , comprising:

said first contact structure being substantially planar with a surface of said first insulating layer.

3. A structure as recited in claim 2 , comprising:

said second contact structure being substantially planar with a surface of said second insulating layer.

4. A structure as recited in claim 1 , wherein said first contact structure comprises one of copper, tungsten, nickel, and gold.

5. A structure as recited in claim 1 , comprising:

each of said first and second contact structures having a polished surface; and

said polished surfaces being in direct contact with each other.

6. A structure as recited in claim 1 , wherein:

said first and second contact structures are nominally the same width; and

a portion of an upper surface of said first contact structure is in contact with said second insulating layer.

7. A structure as recited in claim 1 , wherein a contact resistance between said first and second contact structures is less than 1 ohm/μm 2 .

8. A structure as recited in claim 1 , wherein each of said first and second contact structures comprises a thermally-expanded metal contact structure.

9. A structure ad recited in claim 8 , wherein each of said first and second contact structures comprises one of copper, tungsten, nickel, and gold.

10. A structure as recited in claim 1 , wherein each of said first and second contact structures comprises a metal contact structure with a surface from which a native oxide is removed.

11. A structure as recited in claim 1 , comprising:

a third contact structure connected to said first contact structure and disposed in a via in said first insulating material.

12. A structure as recited in claim 11 , comprising:

said first contact structure having a planar surface connected to said third contact structure.

13. A structure as recited in claim 11 , wherein sides of said via are comprised of a dielectric material.

14. A structure as recited in claim 11 , comprising:

said third contact structure comprising a first metal layer formed on said first insulating material and a second metal layer formed on said first metal layer.

15. A structure as recited in claim 11 , comprising:

said first element having first and second opposing surfaces;

said first surface bonded to said second element; and

said via extending from said second surface to said first contact structure.

16. A structure as recited in claim 11 , wherein:

said first element is bonded to said second element using a direct bonding process.

17. A structure as recited in claim 1 , wherein:

said first and second insulating layers are directly bonded.

18. A structure as recited in claim 1 , wherein said first element comprises a semiconductor substrate.

19. A structure as recited in claim 1 , wherein said first element comprises a semiconductor substrate.

20. A structure, comprising:

a first element having a first substrate, a first upper layer disposed on said first substrate comprising a first insulating region and a first conducting region;

a second element having a second substrate, a second upper layer disposed on said second substrate comprising a second insulating region and a second conducting region;

said first insulating region directly bonded to said second insulating region;

said first conducting region directly connected to said second conducting region; and

at least one of said first and second conducting regions comprises a thermally-expanded metal contact structure.

21. A structure as in claim 20 , wherein at least one of said first and second insulating layers further comprises silicon and at least one of oxygen and nitrogen.

22. A structure as in claim 20 , wherein at least one of said first and second conducting regions further comprises a contact structure.

23. A structure as in claim 22 , wherein said contact structure further comprises multiple contact structures.

24. A structure as in claim 23 , further comprising electrical isolation between at least two of said multiple contact structures.

25. A structure as in claim 20 , wherein at least one of said first and second substrates further comprises a semiconductor device.

26. A structure as in claim 20 , wherein at least one of said first and second substrates further comprises a portion of a semiconductor device.

27. A structure as recited in claim 20 , comprising:

said first conducting region being substantially planar with a surface of said first insulating region.

28. A structure as recited in claim 27 , comprising:

said second conducting region being substantially planar with a surface of said second insulating region.

29. A structure as recited in claim 20 , wherein said first conducting region comprises one of copper, tungsten, nickel, and gold.

30. A structure as recited in claim 20 , comprising:

each of said first and second conducting regions having a polished surface; and

said polished surfaces being in direct contact with each other.

31. A structure as recited in claim 20 , wherein:

said first and second conducting regions are nominally the same width; and

a portion of an upper surface of said first conducting region is in contact with said second insulating region.

32. A structure as recited in claim 20 , wherein a contact resistance between said first and second conducting regions is less than 1 ohm/μm 2 .

33. A structure as recited in claim 20 , wherein each of said first and second conducting regions comprises a thermally-expanded metal contact structure.

34. A structure as recited in claim 33 , wherein each of said first and second conducting regions comprises one of copper, tungsten, nickel, and gold.

35. A structure as recited in claim 20 , wherein each of said first and second conducting regions comprises a metal contact structure with a surface from which a native oxide is removed.

36. A structure as recited in claim 20 , comprising:

a conductive member connected to said first conducting region and disposed in a via in said first insulating region.

37. A structure as recited in claim 36 , comprising:

said first conducting region having a planar surface connected to said conductive member.

38. A structure as recited in claim 36 , wherein sides of said via are comprised of a dielectric material.

39. A structure as recited in claim 36 , comprising:

said conductive member comprising a first metal layer formed on said first insulating region and a second metal layer formed on said first metal layer.

40. A structure as recited in claim 36 , comprising:

said first element having first and second opposing surfaces;

said first surface bonded to said second element; and

said via extending from said second surface to said first conducting region.

41. A structure as recited in claim 20 , wherein:

said first element is bonded to said second element using a direct bonding process.

Assignments (6)
CHANGE OF NAME Recorded Nov 19, 2025
From: INVENSAS BONDING TECHNOLOGIES, INC.
To: ADEIA SEMICONDUCTOR BONDING TECHNOLOGIES INC.
Reel/Frame 073635/0465 →
RELEASE OF SECURITY INTEREST Recorded Jun 11, 2020
From: ROYAL BANK OF CANADA
To: TESSERA, INC.; INVENSAS BONDING TECHNOLOGIES, INC. (F/K/A ZIPTRONIX, INC.); FOTONATION CORPORATION (F/K/A DIGITALOPTICS CORPORATION AND F/K/A DIGITALOPTICS CORPORATION MEMS); INVENSAS CORPORATION; TESSERA ADVANCED TECHNOLOGIES, INC; DTS, INC.; DTS LLC; PHORUS, INC.; IBIQUITY DIGITAL CORPORATION
Reel/Frame 052920/0001 →
SECURITY INTEREST Recorded Jun 1, 2020
From: ROVI SOLUTIONS CORPORATION; ROVI TECHNOLOGIES CORPORATION; ROVI GUIDES, INC.; TIVO SOLUTIONS INC.; VEVEO, INC.; INVENSAS CORPORATION; INVENSAS BONDING TECHNOLOGIES, INC.; TESSERA, INC.; TESSERA ADVANCED TECHNOLOGIES, INC.; DTS, INC.; PHORUS, INC.; IBIQUITY DIGITAL CORPORATION
To: BANK OF AMERICA, N.A.
Reel/Frame 053468/0001 →
CHANGE OF NAME Recorded Jun 28, 2017
From: ZIPTRONIX , INC.
To: INVENSAS BONDING TECHNOLOGIES, INC.
Reel/Frame 043029/0657 →
SECURITY INTEREST Recorded Dec 2, 2016
From: INVENSAS CORPORATION; TESSERA, INC.; TESSERA ADVANCED TECHNOLOGIES, INC.; ZIPTRONIX, INC.; DIGITALOPTICS CORPORATION; DIGITALOPTICS CORPORATION MEMS; DTS, LLC; DTS, INC.; PHORUS, INC.; IBIQUITY DIGITAL CORPORATION
To: ROYAL BANK OF CANADA, AS COLLATERAL AGENT
Reel/Frame 040797/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 9, 2006
From: ENQUIST, PAUL M.; FOUNTAIN, GAIUS GILLMAN JR.; TONG, QIN-YI
To: ZIPTRONIX, INC.
Reel/Frame 017439/0071 →