Inspection methods for a semiconductor device

1. An inspection method for a semiconductor device, comprising:

providing a semiconductor device comprising a substrate, a plurality of gate electrodes protruding from the substrate, a blanket dielectric layer overlying the substrate and gate electrodes, and a plurality of polycrystalline silicon plugs, respectively disposed on the substrate between the gate electrodes, in the dielectric layer;

performing heat treatment on the semiconductor device; and

inspecting the semiconductor device utilizing electron beam to acquire an analysis image;

wherein a piping defect, electrically connecting at least two of the polycrystalline silicon plugs, is determined by the analysis image showing an area with voltage contrast difference.

2. The method as claimed in claim 1 , wherein the heat treatment is performed between 620 and 1000° C.

3. The method as claimed in claim 1 , wherein the heat treatment duration is between 1 and 60 minutes.

4. The method as claimed in claim 1 , wherein the piping defect is detected by the analysis image showing an area with brightness different from background brightness of the image.

5. The method as claimed in claim 1 , wherein the piping defect is detected by the analysis image showing an area brighter than background of the image in extracting mode.

6. The method as claimed in claim 1 , further comprising chemical mechanical polishing the semiconductor device prior to inspecting the semiconductor device.

7. The method as claimed in claim 1 , wherein landing energy of the electron beam during inspection is between 200 and 600 eV.

8. The method as claimed in claim 1 , wherein intermediate energy of the electron beam during inspection is between 600 and 1000 eV.

9. The method as claimed in claim 1 , wherein inspection pixel during ion beam inspection is between 0.05 and 0.15 μm.

10. An inspection method for a semiconductor device, comprising:

providing a semiconductor device comprising a substrate, a dielectric layer overlying the substrate, and a plurality of polycrystalline silicon layers electrically isolated by the dielectric layer;

performing heat treatment on the semiconductor device; and

inspecting the semiconductor device utilizing electron beam to acquire an analysis image;

wherein a piping defect, electrically connects at least two of the polycrystalline silicon layers, is detected by the analysis image showing an area with voltage contrast difference.

11. The method as claimed in claim 10 , wherein the heat treatment is performed between 620 and 1000° C.

12. The method as claimed in claim 10 , wherein the heat treatment duration is between 1 and 60 minutes.

13. The method as claimed in claim 10 , wherein the piping defect is detected by the analysis image showing an area with brightness different from background brightness of the image.

14. The method as claimed in claim 10 , wherein the piping defect is detected by the analysis image showing an area brighter than background of the image in extracting mode.

15. The method as claimed in claim 10 , further comprising chemical mechanical polishing the semiconductor device prior to inspecting the semiconductor device.

16. The method as claimed in claim 10 , wherein landing energy of the electron beam during inspection is between 200 and 600 eV.

17. The method as claimed in claim 10 , wherein intermediate energy of the electron beam during inspection is between 600 and 1000 eV.

18. The method as claimed in claim 10 , wherein inspection pixel during ion beam inspection is between 0.05 and 0.15 μm.