IP Library Granted Patent US 7,374,954
Granted Patent B2
US 7,374,954 · App. 11/227,084 · Granted May 20, 2008

Ferroelectric register, and method for manufacturing capacitor of the same

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Quick Facts
Patent No.
US 7,374,954
App. No.
11/227,084
Granted
May 20, 2008
Kind
B2
Abstract

The present invention discloses a ferroelectric register and a method for manufacturing a capacitor of the same. The ferroelectric register is configured to reduce probability of data storage failure due to a weak state capacitor, by connecting a plurality of capacitors in parallel in a ferroelectric capacitor unit for storing data, instead of using a single capacitor, thereby improving storage reliability and stability. In addition, the ferroelectric register obtains a data sensing margin by pumping a cell plate signal into not a power voltage level but a pumping voltage level.

Claims (7)

1. A method for manufacturing a ferroelectric capacitor of a ferroelectric register which includes a pull-up switch for outputting a power voltage when a pull-up enable signal is activated; a pull-up driving unit for receiving the power voltage from the pull-up switch, and for pulling up a voltage of a data storage node to the power voltage; a write enable control unit for transmitting a differential data to the data storage node according to a write control signal; the ferroelectric capacitor connected between the data storage node and a plate line and storing the differential data when a cell plate signal from the plate line is activated; a pull-down switch for transmitting a ground voltage to the data storage node when a pull-down enable signal is activated; and a pull-down driving unit for receiving the ground voltage from the pull-down switch and for pulling down the voltage of the data storage node to the ground voltage, comprising:

a first process for forming at least two bottom electrode layers commonly connected to the data storage node;

a second process for forming a ferroelectric layer on the at least two bottom electrode layers; and

a third process for forming a top metal layer receiving the cell plate signal on the ferroelectric layer.

2. The method of claim 1 , wherein the two bottom electrode layers correspond to the ferroelectric capacitor and another ferroelectric capacitor which are connected in parallel.

3. The method of claim 2 , wherein the ferroelectric capacitor and the another ferroelectric capacitor form a ferroelectric capacitor unit within the ferroelectric register.

4. The method of claim 3 , wherein, within the ferroelectric capacitor unit, the ferroelectric capacitor and the another ferroelectric capacitor are connected in parallel between the data storage and the ground voltage.

Assignments (3)
CORRECTIVE ASSIGNMENT TO CORRECT THE ASSIGNEE IS HYNIX SEMICONDUCTOR INC. NOT HYNIX-SEMICONDUCTOR INC. THERE IS NO HYPHEN IN THE NAME. PREVIOUSLY RECORDED ON REEL 67328 FRAME 814. ASSIGNOR(S) HEREBY CONFIRMS THE CHANGE OF NAME. Recorded May 14, 2024
From: HYNIX SEMICONDUCTOR INC.
To: SK HYNIX INC.
Reel/Frame 067412/0482 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 9, 2024
From: SK HYNIX INC.
To: MIMIRIP LLC
Reel/Frame 067369/0832 →
CHANGE OF NAME Recorded May 6, 2024
From: HYNIX-SEMICONDUCTOR INC.
To: SK HYNIX INC.
Reel/Frame 067328/0814 →