IP Library Granted Patent US 7,245,148
Granted Patent B2
US 7,245,148 · App. 11/237,287 · Granted Jul 17, 2007

Power saving method in an integrated circuit programming and control circuit

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Quick Facts
Patent No.
US 7,245,148
App. No.
11/237,287
Granted
Jul 17, 2007
Kind
B2
Abstract

A circuit in an integrated circuit having an input terminal to be coupled to a resistor network for selecting one of multiple digital states in the integrated circuit includes a voltage decode circuit, a control circuit and a power-up control circuit. The first input terminal receives an input voltage having a voltage value associated with the multiple digital states. The voltage decode circuit receives the input voltage and generates a voltage decode signal indicative of the voltage value of the input voltage. The control circuit receives the voltage decode signal and generates an output control signal accordingly where the output control signal selects one of the multiple digital states. The power-up control circuit provides power to the resistor network, the voltage decode circuit and the control circuit for determining the selected digital state and disconnects power to those circuits after the selected digital state is determined.

Claims (14)

1. A circuit in an integrated circuit having an input terminal to be coupled to a resistor network for selecting one of a plurality of digital states in the integrated circuit, the circuit comprising:

the first input terminal receiving an input voltage having a first voltage value being one of a plurality of predetermined programming voltage values, each predetermined programming voltage value being associated with one of the plurality of digital states;

a voltage decode circuit for receiving the input voltage and generating a signal indicative of the voltage value of the input voltage;

a control circuit receiving the signal from the voltage decode circuit and generating an output control signal based on the signal from the voltage decode circuit, the output control signal selecting one of the plurality of digital states; and

a power-up control circuit for providing power to the resistor network, the voltage decode circuit and the control circuit for determining the selected digital state and for disconnecting power to the resistor network, the voltage decode circuit and the control circuit after the selected digital state is determined.

2. The circuit of claim 1 , wherein the power-up control circuit instructs the control circuit to latch the value of the output control signal prior to disconnecting power to the resistor network, the voltage decode circuit and the control circuit.

3. The circuit of claim 1 , wherein after disconnecting power to the resistor network, the voltage decode circuit and the control circuit, the power-up control circuit provides power to the resistor network, the voltage decode circuit and the control circuit periodically to determine the currently selected digital state based on the current value of the input voltage.

4. A method in an integrated circuit having an input terminal to be coupled to a resistor network for selecting one of a plurality of digital states in the integrated circuit, the method comprising:

receiving an input voltage on the input terminal, the input voltage having a first voltage value being one of a plurality of predetermined programming voltage values, each predetermined programming voltage value being associated with one of the plurality of digital states;

decoding the input voltage to obtain a voltage decode signal indicative of the voltage value of the input voltage;

generating an output control signal based on the voltage decode signal, the output control signal selecting one of the plurality of digital states; and

disconnecting power to circuitry for receiving the input voltage, decoding the input voltage, and generating the output control signal when the value of the output control signal is determined.

5. The method of claim 4 , further comprising latching the value of the output control signal prior to disconnecting power to circuitry for receiving the input voltage, decoding the input voltage, and generating the output control signal.

6. The method of claim 4 , further comprising powering up the circuitry for receiving the input voltage, decoding the input voltage, and generating the output control signal periodically to based on the current value of the input voltage.

Assignments (9)
INTELLECTUAL PROPERTY BUY-IN AGREEMENT/ASSIGNMENT Recorded Apr 4, 2023
From: MICREL LLC
To: MICROCHIP TECHNOLOGY INCORPORATED
Reel/Frame 063241/0771 →
RELEASE OF SECURITY INTEREST Recorded Mar 14, 2022
From: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS NOTES COLLATERAL AGENT
To: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
Reel/Frame 060894/0437 →
RELEASE OF SECURITY INTEREST Recorded Mar 11, 2022
From: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS NOTES COLLATERAL AGENT
To: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
Reel/Frame 059363/0001 →
RELEASE OF SECURITY INTEREST Recorded Mar 10, 2022
From: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS NOTES COLLATERAL AGENT
To: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
Reel/Frame 059863/0400 →
SECURITY INTEREST Recorded Jun 4, 2021
From: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
To: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS NOTES COLLATERAL AGENT
Reel/Frame 057935/0474 →
SECURITY INTEREST Recorded Dec 24, 2020
From: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
To: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS COLLATERAL AGENT
Reel/Frame 055671/0612 →
SECURITY INTEREST Recorded Jun 5, 2020
From: MICROCHIP TECHNOLOGY INC.; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
To: WELLS FARGO BANK, NATIONAL ASSOCIATION
Reel/Frame 053468/0705 →
RELEASE OF SECURITY INTEREST Recorded May 30, 2020
From: JPMORGAN CHASE BANK, N.A, AS ADMINISTRATIVE AGENT
To: MICROCHIP TECHNOLOGY INC.; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
Reel/Frame 053466/0011 →
SECURITY INTEREST Recorded Apr 24, 2020
From: MICROCHIP TECHNOLOGY INC.; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
To: JPMORGAN CHASE BANK, N.A., AS ADMINISTRATIVE AGENT
Reel/Frame 053311/0305 →