Semiconductor integrated circuit and burn-in test method thereof

1. A semiconductor integrated circuit comprising a first memory, a second memory with a test instruction code stored therein, and a functional unit, said semiconductor integrated circuit further comprising:

a mode selecting unit for selecting a burn-in test mode for carrying out a burn-in test and for outputting predetermined control signals when the burn-in test modes selected;

wherein said burn-in test comprises a first burn-in test and a second burn-in test, and the first burn-in test and the second burn-in test are executed independently to each other according to the predetermined control signals from said mode selecting unit; said first burn-in test performing a reading operation from said first memory with predetermined test data written therein, and said second burn-in test reading out the instruction code in said second memory, for execution and operating said functional unit;

wherein the predetermined control signals comprise a first control signal and a second control signal, and said mode selecting unit outputs the first control signal at a first level when a normal mode for reading out a content stored in said first memory for execution is selected, and when the burn-in test mode is selected, said mode selecting unit outputs the first control signal at a second level and also outputs the second control signal;

wherein said mode selecting unit switches a level of the second control signal with the first control signal at the second level input to said functional unit, thereby alternately switching the first burn-in test and the second burn-in test, for execution; and

wherein said functional unit comprises:

a first selection circuit for switching a destination of output of the content in said first memory according to the level of the second control signal; and

a second selection circuit for switching a source of an input between said first selection circuit and said second memory according to the level of the first control signal, and outputting the input to an instruction register; and

said semiconductor integrated circuit is so configured that switching between the normal mode for reading out the content stored in said first memory for execution and the burn-in test mode can be performed according to the first control signal, and at a time of the burn-in test mode, switching between the first burn-in test and the second burn-in test can be performed according to the level of the second control signal.

2. A semiconductor integrated circuit comprising a first memory, a second memory with a test instruction code stored therein, and a functional unit, said semiconductor integrated circuit further comprising:

a mode selecting unit for selecting a burn-in test mode for carrying out a burn-in test and for outputting predetermined control signals when the burn-in test mode is selected;

wherein said burn-in test comprises a first burn-in test and a second burn-in test, and the first burn-in test and the second burn-in test are executed independently to each other according to the predetermined control signals from said mode selecting unit; said first burn-in test performing a reading operation from said first memory with predetermined test data written therein, and said second burn-in test reading out the instruction code in said second memory, for execution and operating said functional unit; and

wherein said semiconductor integrated circuit further comprises:

an address generation circuit;

wherein said mode selecting unit outputs the control signals at a first level when a normal mode for reading out a content stored in said first memory is selected for execution, and when the burn-in test mode is selected, said mode selecting unit outputs the control signals at a second level; and

wherein said functional unit reads out the instruction code in said second memory, for execution, with the control signals at the second level input thereinto from said mode selecting unit, and said address generation circuit inputs into said first memory an address for reading, thereby executing the first burn-in test and the second burn-in test in parallel.

3. The semiconductor integrated circuit according to claim 2 , wherein said functional unit comprises:

a first selection circuit for switching a destination of output of the content in said first memory according to the level of the control signals; and

a second selection circuit for switching a source of an input between said first selection circuit and said second memory according to the level of the control signals and outputs the input to an instruction register;

said address generation circuit is connected to a third selection circuit for switching a data bus to said first memory from said functional unit to said address generation circuit according to the level of the control signals; and

said semiconductor integrated circuit is so configured that the normal mode for reading out the content in said first memory for execution and the burn-in test mode for executing the first bum-in test and the second burn-in test in parallel can be switched according to the control signals.

4. A burn-in test method for a semiconductor integrated circuit comprising:

providing a semiconductor circuit comprising a first memory, a second memory with a test instruction code stored therein, a functional unit, and a mode selecting unit capable of selecting a burn-in test mode for executing a burn-in test according to an input signal;

writing predetermined test data in said first memory;

outputting predetermined control signals when the burn-in test mode is selected, thereby commanding transition to the burn-in test mode, by said mode selecting unit; and

executing a first burn-in test for performing a reading operation from said first memory with the test data written therein and a second burn-in test for reading out the instruction code in said second memory, for execution and operating said functional unit, independently to each other, in the burn-in test mode;

wherein said mode selecting unit outputs first and second control signals as the predetermined control signals;

wherein said functional unit transitions to the burn-in test mode with the first signal at a second level input thereinto;

wherein said mode selecting unit changes a level of the second control signal at a predetermined time interval in the burn-in test mode, thereby alternately implementing the first burn-in test and the second burn-in test;

wherein said functional unit comprises:

a first selection circuit for switching a destination of output of a content in said first memory according to a level of the second control signal; and

a second selection circuit for switching a source of an input between said first selection circuit and said second memory according to a level of the first control signal, and outputting the input to an instruction register; and

wherein said mode selecting unit operates said second selection circuit according to the first control signal, operates said first selection circuit according to the second control signal with a source of an input to said instruction register switched from said first selection circuit to said second memory, and switches the destination of output of the content in said first memory, thereby alternately implementing the first burn-in test and the second burn-in test.