IP Library Granted Patent US 7,264,986
Granted Patent B2
US 7,264,986 · App. 11/239,783 · Granted Sep 4, 2007

Microelectronic assembly and method for forming the same

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Quick Facts
Patent No.
US 7,264,986
App. No.
11/239,783
Granted
Sep 4, 2007
Kind
B2
Abstract

According to one aspect of the present invention, a method is provided for forming a microelectronic assembly. The method comprises forming first and second trenches on a semiconductor substrate, filling the first and second trenches with an etch stop material, forming an inductor on the semiconductor substrate, forming an etch hole in at least one of the etch stop layer and the semiconductor substrate to expose the substrate between the first and second trenches, isotropically etching the substrate between the first and second trenches through the etch hole to create a cavity within the substrate, and forming a sealing layer over the etch hole to seal the cavity.

Claims (23)

1. A method for forming a microelectronic assembly, comprising:

forming first and second trenches on a semiconductor substrate;

filling the first and second trenches with an etch stop material;

forming an inductor having a coil wrapped around an inductor center point over the semiconductor substrate, wherein the first trench is positioned between the inductor center point and the second trench;

forming an etch hole in at least one of the etch stop layer and the semiconductor substrate to expose the substrate between the first and second trenches;

isotropically etching the substrate between the first and second trenches through the etch hole to create a cavity within the substrate; and

forming a sealing layer over the etch hole to seal the cavity.

2. The method of claim 1 , further comprising positioning at least a portion of the inductor over the cavity.

3. The method of claim 2 , wherein the first and second trenches are formed around the inductor center point.

4. The method of claim 3 , wherein both the first trench and the second trench are centered on the inductor center point.

5. The method of claim 4 , further comprising forming at least one support trench interconnecting the first and second trenches, said formation of the etch stop layer filling the at least one support trench.

6. The method of claim 4 , further comprising: forming a plurality of support structure formation trenches between the first and second trenches, the support structure formation trenches having a depth that is less than the depth of the first and second trenches and width that is less than the width of the first and second trenches; and filling the plurality of support structure formation trenches with the etch stop material to form an annular support structure between the first and second trenches.

7. A method for forming a microelectronic assembly, comprising:

forming first and second trenches around a trench center point on a first surface of a semiconductor substrate having the first surface and a second surface opposing the first surface and comprising a semiconductor material, the first trench being positioned between the trench center point and the second trench;

forming an etch stop layer over the surface of the semiconductor substrate, the etch stop layer filling the first and second trenches;

forming an inductor over the surface of the semiconductor substrate;

forming an etch hole through the etch stop layer to expose the semiconductor material between the first and second trenches;

isotropically etching the semiconductor material between the first and second trenches through the etch hole to create a cavity within the semiconductor substrate; and

forming a sealing layer over the etch stop layer to seal the cavity.

8. The method of claim 7 , wherein the inductor comprises a coil wrapped around the trench center point and at least a portion of the coil is positioned over the cavity.

9. The method of claim 8 , wherein the first and second trenches have a substantially circular shape and the cavity has an annular ring shape.

10. The method of claim 9 , further comprising forming a plurality of support trenches interconnecting the first and second trenches, said formation of the etch stop layer filling the support trenches with the etch stop material.

11. The method of claim 9 , further comprising forming a plurality of support structure formation trenches between the first and second trenches, the support structure formation trenches having a depth that is less than the depth of the first and second trenches and width that is less than the width of the first and second trenches, said formation of the etch stop layer filling the plurality of support structure formation trenches and causing an annular support structure, comprising the etch stop material, to be formed between the first and second trenches.

Assignments (17)
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 11759915 AND REPLACE IT WITH APPLICATION 11759935 PREVIOUSLY RECORDED ON REEL 040925 FRAME 0001. ASSIGNOR(S) HEREBY CONFIRMS THE RELEASE OF SECURITY INTEREST. Recorded Feb 17, 2020
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP, B.V. F/K/A FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 052917/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 11759915 AND REPLACE IT WITH APPLICATION 11759935 PREVIOUSLY RECORDED ON REEL 040928 FRAME 0001. ASSIGNOR(S) HEREBY CONFIRMS THE RELEASE OF SECURITY INTEREST. Recorded Jan 17, 2020
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP B.V.
Reel/Frame 052915/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 11759915 AND REPLACE IT WITH APPLICATION 11759935 PREVIOUSLY RECORDED ON REEL 037486 FRAME 0517. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS. Recorded Dec 10, 2019
From: CITIBANK, N.A.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 053547/0421 →
323.01(C) ASSIGNMENT OR CHANGE OF NAME IMPROPERLY FILED AND RECORDED BY ANOTHER PERSON AGAINST OWNER'S PATENT Recorded Oct 3, 2019
From: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
To: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
Reel/Frame 052459/0656 →
CORRECTIVE ASSIGNMENT TO CORRECT THE TO CORRECT THE APPLICATION NO. FROM 13,883,290 TO 13,833,290 PREVIOUSLY RECORDED ON REEL 041703 FRAME 0536. ASSIGNOR(S) HEREBY CONFIRMS THE THE ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS.. Recorded Feb 20, 2019
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: SHENZHEN XINGUODU TECHNOLOGY CO., LTD.
Reel/Frame 048734/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 15, 2017
From: NORTH STAR INNOVATIONS INC.
To: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
Reel/Frame 041717/0736 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE PATENTS 8108266 AND 8062324 AND REPLACE THEM WITH 6108266 AND 8060324 PREVIOUSLY RECORDED ON REEL 037518 FRAME 0292. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS. Recorded Feb 1, 2017
From: CITIBANK, N.A.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 041703/0536 →
RELEASE OF SECURITY INTEREST Recorded Nov 7, 2016
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP B.V.
Reel/Frame 040928/0001 →
RELEASE OF SECURITY INTEREST Recorded Sep 21, 2016
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP, B.V., F/K/A FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 040925/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 4, 2016
From: FREESCALE SEMICONDUCTOR, INC.
To: NORTH STAR INNOVATIONS INC.
Reel/Frame 037694/0264 →
ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS Recorded Jan 13, 2016
From: CITIBANK, N.A.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 037518/0292 →
ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS Recorded Jan 12, 2016
From: CITIBANK, N.A.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 037486/0517 →
PATENT RELEASE Recorded Dec 21, 2015
From: CITIBANK, N.A., AS COLLATERAL AGENT
To: FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 037356/0143 →
PATENT RELEASE Recorded Dec 21, 2015
From: CITIBANK, N.A., AS COLLATERAL AGENT
To: FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 037354/0225 →
PATENT RELEASE Recorded Dec 21, 2015
From: CITIBANK, N.A., AS COLLATERAL AGENT
To: FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 037354/0704 →
PATENT RELEASE Recorded Dec 21, 2015
From: CITIBANK, N.A., AS COLLATERAL AGENT
To: FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 037356/0553 →
SECURITY AGREEMENT Recorded Nov 6, 2013
From: FREESCALE SEMICONDUCTOR, INC.
To: CITIBANK, N.A., AS NOTES COLLATERAL AGENT
Reel/Frame 031591/0266 →