NICAM processing method
View Patent ↗A NICAM processing method includes receiving and temporarily storing a current frame of A-channel and B-channel input data into a first memory at a first clock rate. Companded A-channel and B-channel data of a previous frame are read from a second memory at a second clock rate and in a manner for interleaving the previous frame companded A-channel and B-channel data into the NICAM standard required interleaved format, wherein the companded A-channel and B-channel data of the previous frame was temporarily stored during a previous frame into the second memory in a format other than an interleaved format according to NICAM standard requirements. The A-channel and B-channel input data of the current frame is companded and stored into the second memory and in the format other than the interleaved format, wherein the companding and storing are performed at a third clock rate during an interval within the current frame that occurs subsequent to both the storing into the first memory and the reading from the second memory.
1. A NICAM processing method comprising:
receiving and temporarily storing a current frame of A-channel and B-channel input data into a first memory at a first clock rate;
reading companded A-channel and B-channel data of a previous frame from a second memory at a second clock rate and in a manner for interleaving the previous frame companded A-channel and B-channel data into the NICAM standard required interleaved format, the companded A-channel and B-channel data of the previous frame having been temporarily stored during a previous frame into the second memory in a format other than an interleaved format according to NICAM standard requirements, wherein the second memory includes a first RAM and a second RAM, and wherein the format other than the interleaved format according to the NICAM standards comprises a dual word pre-interleaved format, and wherein each dual word of the dual word pre-interleaved format comprises 22-bits of a companded A-channel word and a companded B-channel word pair, and wherein each dual word is stored in one of the first RAM or the second RAM, and wherein the reading the companded A-channel and B-channel data of the previous frame from the second memory comprises:
(i) reading a first dual word from an address of said first RAM and a second dual word from an address of said second RAM, wherein said address of said first RAM and said address of said second RAM have a same address value,
(ii) extracting a bit from a first word of the first dual word and a bit from a second word of the second dual word to form a dibit, wherein the bit from the first word is a MSB of the dibit and the bit from the second word is the LSB of the dibit, and
(iii) repeating the reading and extracting until all dibits contained within the second memory have been read and extracted, wherein the read and extracted dibits together form a bit stream of 704 bits of interleaved and companded A-channel and B-channel data according to NICAM standard requirements; and
companding the A-channel and B-channel input data of the current frame and storing the companded A-channel and B-channel input data of the current frame into the second memory and in the format other than the interleaved format, wherein the companding and storing are performed at a third clock rate during an interval within the current frame that occurs subsequent to both the storing into the first memory and the reading from the second memory.
2. The NICAM processing method of claim 1 , further comprising:
generating a first portion of an output bit stream, the first portion including a frame alignment word (FAW), control information and additional data; multiplexing the first portion with a payload portion of the output bit stream as a function of the interleaved companded A-channel and B-channel data of the previous frame, wherein the output bit stream comprises the first portion and the payload portion, and
outputting the output bit stream.
3. The NICAM processing method of claim 2 , further comprising:
differentially encoding the output bit stream prior to outputting.
4. The NICAM processing method of claim 2 , wherein the first portion of the output bit stream comprises dibits of the (a) frame alignment word (FAW), (b) control information and (c) additional data, and wherein the payload portion of the output bit stream comprises dibits of the interleaved companded A-channel and B-channel data of the previous frame as interleaved through reading from the second memory.
5. The NICAM processing method of claim 1 , wherein the first clock rate, the second clock rate, and the third clock rate are different from one another.
6. The NICAM processing method of claim 1 , wherein the second memory comprises first and second companded data RAMs, and wherein said companding and storing further comprises storing the companded data into first and second companded data RAMs in a prescribed order, and wherein said reading further comprises reading from the first and second companded data RAMs using first and second bit extractors, respectively, for extracting two bits per access of the first and second companded data RAMs, wherein the two extracted bits per access correspond to a dibit.
7. The NICAM processing method of claim 6 , wherein the interval is subsequent to reading a last dibit from the second memory and prior to the beginning of a subsequent frame.
8. The NICAM processing method of claim 1 , wherein said inputting and storing of the A-channel and B-channel input data of the current frame in the first memory is performed concurrently with said reading of the previous frame companded A-channel and B-channel data from the second memory.
9. The NICAM processing method of claim 2 , wherein the first clock rate comprises 32 kHz, the second clock rate comprises one of approximately 364 kHz or 728 kHz, and the third clock rate comprises approximately 24 MHz, and wherein the interleaved companded A-channel and B-channel data of the previous frame comprises the payload portion of the output bit stream, further wherein the output bit stream comprises one of (i) single bits or (ii) dibits, corresponding to a single bit stream at 728 kHz or a dibit bit stream at 364 kHz, respectively.
10. The NICAM processing method of claim 1 , wherein said NICAM processing is performed via a single integrated circuit chip implementation.
11. The NICAM processing method of claim 1 , wherein the first memory comprises a (32×28) RAM, and wherein the second memory comprises first and second (16×22) RAMs.
12. The NICAM processing method of claim 11 , further wherein the first and second (16×22) RAMs store companded A-channel and B-channel word pairs in a pre-interleaved manner and wherein said reading from the second memory further comprises reading the companded A-channel and B-channel word pairs from the first and second (16×22) RAMS in an interleaved manner.
13. The NICAM processing method of claim 1 , wherein the companded A-channel and B-channel data of the current frame comprise word pairs of 22-bits each, said NICAM processing method further comprising:
scrambling each 22-bit companded A-channel and B-channel data word pair, in association with said companding and storing, wherein scrambling comprises use of an (N×22) ROM and an EX-OR gate block, further wherein a 22-bit output of the (N×22) ROM is coupled to first inputs of the EX-OR gate block and the 22-bit companded A-channel and B-channel data word pairs are coupled, one word pair at a time, to second inputs of the EX-OR gate block, where N is equal to 32.
14. The NICAM processing method of claim 13 , further wherein the (N×22) ROM contains a look-up table, and wherein scrambling is re-initialized at the beginning of every frame.
15. The NICAM processing method of claim 1 , further comprising:
scrambling the interleaved companded A-channel and B-channel data of the previous frame, wherein scrambling comprises use of an (M×2) ROM and a dual EX-OR gate, further wherein a 2-bit output of the (M×2) ROM is coupled to first inputs of the dual EX-OR gate and a 2-bit MSB and LSB portion of interleaved companded A-channel and B-channel data is coupled, 2-bits at a time, to second inputs of the dual EX-OR gate, where M is equal to 352.
16. The NICAM processing method of claim 15 , further wherein the (M×2) ROM contains a look-up table, and wherein scrambling is re-initialized at the beginning of every frame.
17. The NICAM processing method of claim 1 , wherein the repeating the reading and extracting comprises:
reading and extracting all dibits contained within a first portion of each of the first RAM and the second RAM, and
after the reading and extracting all dibits from the first portion of each of the first RAM and the second RAM, reading and extracting all dibits contained within a second portion of each of the first RAM and the second RAM.
18. The NICAM processing method of claim 17 , wherein each of the first RAM and the second RAM is a (16×22) RAM, and wherein the first portion of each of the first RAM and the second RAM comprises rows corresponding to addresses 0 through 7 and the second portion of each of the first RAM and the second RAM comprises rows corresponding to addresses 8 through 15 .
19. A NICAM processing method comprising:
receiving A-channel and B-channel input data and temporarily storing a current frame of A-channel and B-channel input data into a first memory at a first clock rate;
temporarily storing companded A-channel and B-channel data of a previous frame into a second memory in a format other than an interleaved format according to NICAM standard requirements, wherein the second memory includes a first RAM and a second RAM, and wherein the format other than the interleaved format according to the NICAM standards comprises a dual word pre-interleaved format, and wherein each dual word of the dual word pre-interleaved format comprises 22-bits of a companded A-channel word and a companded B-channel word pair, and wherein each dual word is stored in one of the first RAM or the second RAM;
reading the previous frame companded A-channel and B-channel data from the second memory at a second clock rate and in a manner for interleaving the previous frame companded A-channel and B-channel data into the NICAM standard required interleaved format, wherein the reading the previous frame companded A-channel and B-channel data from the second memory comprises:
(i) reading a first dual word from an address of said first RAM and a second dual word from an address of said second RAM, wherein said address of said first RAM and said address of said second RAM have a same address value,
(ii) extracting a bit from a first word of the first dual word and a bit from a second word of the second dual word to form a dibit, wherein the bit from the first word is a MSB of the dibit and the bit from the second word is the LSB of the dibit, and
(iii) repeating the reading and extracting until all dibits contained within the second memory have been read and extracted, wherein the read and extracted dibits together form a bit stream of 704 bits of interleaved and companded A-channel and B-channel data according to NICAM standard requirements; and
companding the A-channel and B-channel input data of the current frame and storing the companded A-channel and B-channel input data of the current frame into the second memory at a third clock rate and in the format other than the interleaved format, wherein said companding and storing are performed during an interval within the current frame, subsequent to the storing into the first memory and the reading from the second memory, wherein the first clock rate, the second clock rate, and the third clock rate are different from one another.