Voltage controlled oscillator circuitry and methods
View Patent ↗Voltage controlled oscillator (“VCO”) circuitry includes LC tank or ring VCO circuitry and frequency divider circuitry that divides the frequency output by the oscillator circuitry by a selectable integer factor that is at least 2 in the case of a ring oscillator or at least 4 in the case of an LC tank oscillator. This arrangement allows the oscillator circuitry to operate at frequencies that are higher than the desired final output frequencies, which has such advantages as reducing the size and power consumption of the oscillator circuitry, and allowing the circuitry as a whole to have a wide range of operating frequencies while reducing the frequency range over which the oscillator circuitry may be required to operate.
1. Voltage controlled oscillator circuitry comprising:
two-stage coupled quadrature LC tank oscillator circuitry which produces four output signals that are in phase quadrature with one another; and
frequency divider circuitry for dividing the frequency of an output signal of the two-stage coupled quadrature LC tank oscillator circuitry by a factor of at least 4, comprising:
first frequency divider circuitry for dividing frequency of at least two of the output signals by a factor of 2; and
second frequency modification circuitry that employs outputs of the first frequency divider circuitry to increase an overall frequency division factor of the divider circuitry from 2 by an additional integer value that is at least 2.
2. The circuitry defined in claim 1 wherein the additional integer value is selectable from a plurality of possible integer values.
3. The circuitry defined in claim 2 wherein the second frequency modification circuitry operates by synthesizing a signal from features of more than one of the outputs of the first frequency divider circuitry.
4. The circuitry defined in claim 1 further comprising:
control circuitry for controllably varying frequency of oscillation of the LC tank oscillator circuitry.
5. The circuitry defined in claim 1 further comprising:
control circuitry for controllably varying the factor employed by the frequency divider circuitry.
6. The circuitry defined in claim 4 wherein the control circuitry additionally controllably varies the factor employed by the frequency divider circuitry.
7. The circuitry defined in claim 1 wherein the second frequency modification circuitry further employs outputs of the first frequency divider circuitry to establish a duty cycle for an output signal of the second frequency modification circuitry.
8. The circuitry defined in claim 7 wherein the second frequency modification circuit can select the duty cycle from a plurality of possible duty cycles.
9. Voltage controlled oscillator circuitry comprising:
ring oscillator circuitry which produces four output signals that are in phase quadrature with one another; and
first frequency divider circuitry for dividing frequency of at least two of the output signals by a factor of 2; and
second frequency modification circuitry that employs outputs of the first frequency divider circuitry to optionally increase an overall frequency division factor of the frequency divider circuitry from 2 by an additional integer value that is at least 1.
10. The circuitry defined in claim 9 wherein the additional integer value is selectable from a plurality of possible integer values.
11. The circuitry defined in claim 9 wherein the second frequency modification circuitry operates by synthesizing a signal from features of more than one of the outputs of the first frequency divider circuitry.
12. The circuitry defined in claim 9 further comprising:
control circuitry for controllably varying frequency of oscillation of the ring oscillator circuitry.
13. The circuitry defined in claim 9 further comprising:
control circuitry for controllably varying the factor employed by the frequency divider circuitry by a factor stored in memory.
14. The circuitry defined in claim 12 wherein the control circuitry additionally controllably varies the factor employed by the frequency divider circuitry.
15. The circuitry defined in claim 9 wherein the second frequency modification circuitry further employs outputs of the first frequency divider circuitry to establish a duty cycle for an output signal of the second frequency modification circuitry.
16. The circuitry defined in claim 15 wherein the second frequency modification circuitry can select the duty cycle from a plurality of possible duty cycles.
17. Circuitry for producing a delayed clock signal comprising:
VCO circuitry for producing a plurality of phase-spaced output signals; and
frequency divider circuitry for dividing frequency of the output signals by a factor of 2; and
second frequency modification circuitry to optionally increase an overall frequency division factor of the clock signal synthesis circuitry from 2 by an additional integer value that is at least 1.
18. The circuitry defined in claim 17 wherein the VCO circuitry is selected from the group consisting of LC tank oscillator circuitry and ring oscillator circuitry.