IP Library Granted Patent US 7,153,761
Granted Patent B1
US 7,153,761 · App. 11/243,010 · Granted Dec 26, 2006

Method of transferring a thin crystalline semiconductor layer

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Quick Facts
Patent No.
US 7,153,761
App. No.
11/243,010
Granted
Dec 26, 2006
Kind
B1
Abstract

A method for transferring a thin semiconductor layer from one substrate to another substrate involves depositing a thin epitaxial monocrystalline semiconductor layer on a substrate having surface contaminants. An interface that includes the contaminants is formed in between the deposited layer and the substrate. Hydrogen atoms are introduced into the structure and allowed to diffuse to the interface. Afterward, the thin semiconductor layer is bonded to a second substrate and the thin layer is separated away at the interface, which results in transferring the thin epitaxial semiconductor layer from one substrate to the other substrate.

Claims (26)

1. A method for transferring a thin epitaxial semiconductor layer from one substrate to another substrate comprising:

providing a first substrate having a first surface having surface contaminants;

depositing a monocrystalline epitaxial semiconductor layer on the contaminated first surface whereby a substantially non-porous interface including the surface contaminants is formed between the first substrate and the deposited monocrystalline epitaxial semiconductor layer;

contacting the monocrystalline epitaxial semiconductor layer with hydrogen atoms and hydrogen molecules and allowing the hydrogen to diffuse to the substantially non-porous interface;

bonding the layer of monocrystalline epitaxial semiconductor layer to a second substrate to form an intermediate structure; and

separating the intermediate structure at the substantially non-porous interface between the first substrate and the monocrystalline epitaxial semiconductor layer, thereby transferring the monocrystalline epitaxial semiconductor layer from the first substrate to the second substrate.

2. The method of claim 1 , wherein the surface contaminants are provided by exposing the first substrate to a solution comprising at least one chemical selected from the group consisting of H 2 O, H 2 O 2 , H 2 SO 4 , HF, NH 4 OH, HCl, H 3 PO 4 , and CH 3 COOH.

3. The method of claim 1 , wherein the monocrystalline epitaxial semiconductor layer is deposited by molecular beam epitaxy, chemical vapor deposition, metal-organic vapor phase epitaxy, sputtering, or ion beam assisted deposition.

4. The method of claim 1 , further comprising heating the first substrate at an elevated temperature while depositing the monocrystalline epitaxial semiconductor layer on the first substrate to minimize defects in the epitaxial monocrystalline layer.

5. The method of claim 1 , wherein the step of contacting the monocrystalline epitaxial layer with hydrogen comprises plasma hydrogenation.

6. The method of claim 5 , further comprising adjusting the temperature of the first substrate and deposited monocrystalline epitaxial layer during plasma hydrogenation such that blistering on the surface is minimized.

7. The method of claim 1 , wherein the step of contacting the monocrystalline epitaxial layer with hydrogen comprises hydrogen ion implantation, wherein hydrogen comprises normal hydrogen atoms (H), deuterium atoms (D), hydrogen molecules (H2), deuterium molecules (D2), hydrogen deuterium (HD), and mixtures thereof.

8. The method of claim 7 , wherein the temperature of the first substrate and the deposited monocrystalline epitaxial layer during hydrogen implantation is from about minus 196 degrees Celsius to about 500 degrees Celsius.

9. The method of claim 1 , wherein the step of separating the intermediate structure comprises heating the intermediate structure at a temperature high enough to produce cracks at the interface.

10. The method of claim 1 wherein the step of contacting the monocrystalline epitaxial layer with hydrogen comprises electrically connecting the layer to an electrolytic cell and exposing the layer to an electrolyte in the electrolytic cell, wherein at least some of the electrolyte dissociates to produce hydrogen ions.

11. The method of claim 1 , wherein separating the intermediate structure at the interface comprises subjecting the intermediate structure to an externally applied force.

12. The method of claim 1 , wherein providing a first substrate comprises forming an islanded layer of contaminants on a surface of the first substrate.

13. The method of claim 1 , wherein the deposited epitaxial semiconductor layer has a thickness less than 2000 Angstroms.

14. The method of claim 1 , wherein the deposited epitaxial semiconductor layer is a material of the formula Si 1-y C y , Si 1-x-y C x Ge y , or Si 1-y Ge y , where x and y are in the range of from about 1 percent to about 100 percent.

15. The method of claim 1 , wherein the deposited epitaxial semiconductor layer is silicon and the first substrate is silicon.

16. The method of claim 1 , wherein the contaminants comprise hydrogen, carbon, oxygen, fluorine, chlorine, sulfur, or combinations thereof.

17. The method of claim 15 , wherein the second substrate comprises silicon, oxidized silicon, glass, quartz, sapphire or combinations thereof.

18. The method of claim 15 , further comprising forming an encapsulating layer of silicon dioxide on the monocrystalline epitaxial layer before introducing hydrogen atoms into the monocrystalline epitaxial layer.

19. The method of claim 1 , wherein the deposited monocrystalline epitaxial semiconductor layer is a group III-V compound material selected from the group consisting of AlP, AlAs, AlSb, GaP, GaAs, GaSb, InP, InAs, and InSb.

20. The method of claim 1 , wherein the deposited monocrystalline epitaxial semiconductor layer is a group II-VI compound material selected from the group consisting of ZnO, ZnS, ZnSe, ZnTe, CdS, CdSe, CdTe, HgS, HgSe, and HgTe.

21. The method of claim 1 , wherein the deposited monocrystalline epitaxial semiconductor layer is a group III nitride compound material selected from the group consisting of AlN, GaN, and InN.

Assignments (15)
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 11759915 AND REPLACE IT WITH APPLICATION 11759935 PREVIOUSLY RECORDED ON REEL 040925 FRAME 0001. ASSIGNOR(S) HEREBY CONFIRMS THE RELEASE OF SECURITY INTEREST. Recorded Feb 17, 2020
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP, B.V. F/K/A FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 052917/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 11759915 AND REPLACE IT WITH APPLICATION 11759935 PREVIOUSLY RECORDED ON REEL 040928 FRAME 0001. ASSIGNOR(S) HEREBY CONFIRMS THE RELEASE OF SECURITY INTEREST. Recorded Jan 17, 2020
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP B.V.
Reel/Frame 052915/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 11759915 AND REPLACE IT WITH APPLICATION 11759935 PREVIOUSLY RECORDED ON REEL 037486 FRAME 0517. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS. Recorded Dec 10, 2019
From: CITIBANK, N.A.
To: MORGAN STANLEY SENIOR FUNDING, INC.
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CORRECTIVE ASSIGNMENT TO CORRECT THE TO CORRECT THE APPLICATION NO. FROM 13,883,290 TO 13,833,290 PREVIOUSLY RECORDED ON REEL 041703 FRAME 0536. ASSIGNOR(S) HEREBY CONFIRMS THE THE ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS.. Recorded Feb 20, 2019
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: SHENZHEN XINGUODU TECHNOLOGY CO., LTD.
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CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE PATENTS 8108266 AND 8062324 AND REPLACE THEM WITH 6108266 AND 8060324 PREVIOUSLY RECORDED ON REEL 037518 FRAME 0292. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS. Recorded Feb 1, 2017
From: CITIBANK, N.A.
To: MORGAN STANLEY SENIOR FUNDING, INC.
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CORRECTIVE ASSIGNMENT TO CORRECT THE NATURE OF CONVEYANCE LISTED CHANGE OF NAME SHOULD BE MERGER AND CHANGE PREVIOUSLY RECORDED AT REEL: 040652 FRAME: 0180. ASSIGNOR(S) HEREBY CONFIRMS THE MERGER AND CHANGE OF NAME. Recorded Jan 12, 2017
From: FREESCALE SEMICONDUCTOR INC.
To: NXP USA, INC.
Reel/Frame 041354/0148 →
CHANGE OF NAME Recorded Nov 8, 2016
From: FREESCALE SEMICONDUCTOR INC.
To: NXP USA, INC.
Reel/Frame 040652/0180 →
RELEASE OF SECURITY INTEREST Recorded Nov 7, 2016
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP B.V.
Reel/Frame 040928/0001 →
RELEASE OF SECURITY INTEREST Recorded Sep 21, 2016
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP, B.V., F/K/A FREESCALE SEMICONDUCTOR, INC.
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ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS Recorded Jan 13, 2016
From: CITIBANK, N.A.
To: MORGAN STANLEY SENIOR FUNDING, INC.
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ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS Recorded Jan 12, 2016
From: CITIBANK, N.A.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 037486/0517 →
PATENT RELEASE Recorded Dec 21, 2015
From: CITIBANK, N.A., AS COLLATERAL AGENT
To: FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 037356/0143 →
PATENT RELEASE Recorded Dec 21, 2015
From: CITIBANK, N.A., AS COLLATERAL AGENT
To: FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 037354/0225 →
PATENT RELEASE Recorded Dec 21, 2015
From: CITIBANK, N.A., AS COLLATERAL AGENT
To: FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 037356/0553 →
SECURITY AGREEMENT Recorded Nov 6, 2013
From: FREESCALE SEMICONDUCTOR, INC.
To: CITIBANK, N.A., AS NOTES COLLATERAL AGENT
Reel/Frame 031591/0266 →