IP Library Granted Patent US 7,707,234
Granted Patent B2
US 7,707,234 · App. 11/244,616 · Granted Apr 27, 2010

Use of multiple data comparators in parallel to trigger an oscilloscope on a pattern found in a serial data stream

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Quick Facts
Patent No.
US 7,707,234
App. No.
11/244,616
Granted
Apr 27, 2010
Kind
B2
Abstract

A method and system are provided for determining a location of a predetermined N bit sequence in a data stream. The method comprises the steps of determining two N bit data words from consecutive bits of the data stream, and providing N, N bit comparators. A first N bits of the two N bit data words is compared with the predetermined N bit data sequence by a first of the N comparators, and a next N bits, starting at a second bit, of the two N bit data words are compared with the predetermined N bit sequence by a second of the N bit comparators. These comparisons are repeated, incrementing the starting bit, until N comparators have been employed and the first through N bits have been employed as the starting bit.

Claims (40)

1. A method for determining a location of a predetermined N bit sequence in a data stream, comprising the steps of:

(a) determining two N bit data words from consecutive bits of the data stream;

(b) providing N, N bit comparators;

(c) comparing a first N bits of the two N bit data words with the predetermined N bit data sequence by a first of the N comparators;

(d) comparing a next N bits, starting at a second bit, of the two N bit data words with the predetermined N bit sequence by a second of the N bit comparators: and

(e) repeating step (d), incrementing the starting bit, until N comparators have been employed and the first through N bits have been employed as the starting bit;

(f) discarding first N bit data word when all N sequences N data bits as compared by one of the N comparators do not match the predetermined N bit sequence;

(g) shifting the second N bit data word to become the first N bit data word;

(h) determining a next N bit data word from next consecutive bits of the data stream to become the second N bit data word; and

(i) performing steps (c)-(e) on the two current N bit data words.

2. The method of claim 1 , further comprising the steps of:

determining that a sequence of N data bits as compared by one of the N comparators matches the predetermined N bit sequence;

determining which of the N comparators contained the N data bits that matched the predetermined N bit sequence; and

based upon a predetermined bit delay associated with each of the N comparators, determining a precise timing within the data stream containing the N data bits that matches the predetermined bit sequence.

3. The method of claim 1 , wherein each comparator operates at a frequency of 1/N.

4. The method of claim 1 , wherein the N comparators are employed substantially in parallel.

5. A computer program, adapted to operate in accordance with a data acquisition system and stored on a computer readable medium associated therewith, for determining a location of a predetermined N bit sequence in a data stream, comprising instructions for performing the steps of:

(a) determining two N bit data words from consecutive bits of the data stream;

(b) providing N, N bit comparators;

(c) comparing a first N bits of the two N bit data words with the predetermined N bit data sequence by a first of the N comparators;

(d) comparing a next N bits, starting at a second bit, of the two N bit data words with the predetermined N bit sequence by a second of the N bit comparators: and

(e) repeating step (d), incrementing the starting bit, until N comparators have been employed and the first through N bits have been employed as the starting bit;

(f) discarding first N bit data word when all N sequences N data bits as compared by one of the N comparators do not match the predetermined N bit sequence;

(g) shifting the second N bit data word to become the first N bit data word;

(h) determining a next N bit data word from next consecutive bits of the data stream to become the second N bit data word; and

(i) performing steps (c)-(e) on the two current N bit data words.

6. The computer program of claim 5 , further comprising instructions for performing the steps of:

determining that a sequence of N data bits as compared by one of the N comparators matches the predetermined N bit sequence;

determining which of the N comparators contained the N data bits that matched the predetermined N bit sequence; and

based upon a predetermined bit delay associated with each of the N comparators, determining a precise timing within the data stream containing the N data bits that matches the predetermined bit sequence.

7. The computer program of claim 5 , wherein each comparator operates at a frequency of 1/N.

8. The computer program of claim 5 , wherein the N comparators are employed substantially in parallel.

9. A system for determining a location of a predetermined N bit sequence in a data stream, comprising:

a selector for determining two N bit data words from consecutive bits of the data stream;

N, N bit comparators for comparing, by the first N bit comparator, a first N bits of the two N bit data words with the predetermined N bit data sequence by a first of the N comparators, and by a second N bit comparator, comparing a next N bits, starting at a second bit, of the two N bit data words with the predetermined N bit sequence by a second of the N bit comparators;

wherein such comparison is performed by each of the N bit comparators, incrementing the starting bit, until all N comparators have been employed and the first through N bits have been employed as the starting bit; and

wherein when it is determined that all N sequences of N data bits as compared by one of the N comparators do not match the predetermined N bit sequence, the first N bit data word is discarded, the second N bit data word is shifted to become the first N bit data word, the selector determines a next N bit data word from next consecutive bits of the data stream to become the second N bit word, and the N, N bit comparators perform new comparisons.

10. The system of claim 9 , wherein each of the N, N bit comparators determines whether a sequence of N data bits matches the predetermined N bit sequence, and wherein, based upon a predetermined bit delay associated with each of the N comparators, determining a precise timing within the data stream containing the N data bits that matches the predetermined bit sequence.

11. The system of claim 9 , wherein each comparator operates at a frequency of 1/N.

12. The system of claim 9 , wherein the N comparators are employed substantially in parallel.

Assignments (6)
RELEASE OF SECURITY INTEREST Recorded Oct 19, 2012
From: RBS CITIZENS, N.A.
To: TELEDYNE LECROY, INC.
Reel/Frame 029155/0478 →
MERGER Recorded Oct 19, 2012
From: LECROY CORPORATION
To: TELEDYNE LECROY, INC.
Reel/Frame 029162/0724 →
RELEASE OF SECURITY INTEREST Recorded Oct 15, 2012
From: MANUFACTURERS AND TRADERS TRUST COMPANY, AS AGENT
To: LECROY CORPORATION
Reel/Frame 029128/0280 →
RELEASE OF SECURITY INTEREST Recorded Oct 15, 2012
From: MANUFACTURERS AND TRADERS TRUST COMPANY, AS AGENT
To: LECROY CORPORATION
Reel/Frame 029129/0880 →
SECURITY AGREEMENT Recorded Aug 30, 2011
From: LECROY CORPORATION
To: RBS CITIZENS, N.A., AS ADMINISTRATIVE AGENT
Reel/Frame 026826/0850 →
SECURITY AGREEMENT Recorded Aug 27, 2010
From: LECROY CORPORATION
To: MANUFACTURERS AND TRADERS TRUST COMPANY
Reel/Frame 024892/0689 →