Method and system for designing a flexible hardware state machine

1. A method for performing hardware tasks in an application specific integrated circuit (ASIC) with a hardware state machine and a processor, comprising:

setting a breakpoint condition for a state machine state by programming a control register in the ASIC, wherein the breakpoint condition is set for the state after a problem is discovered with a particular task for the state;

running the processor in a parallel mode with the state machine;

using a status register to pass control to the processor after the breakpoint condition is encountered, wherein the state machine passes control to the processor after the state machine detects that the breakpoint condition has occurred for the state;

performing a task associated with the state, wherein the processor performs the task which was meant to be performed by the state machine; and

transferring control back to the state machine after the processor performs the task associated with the state;

wherein the ASIC comprises the hardware state machine and the processor in a single component.

2. The method of claim 1 , wherein the breakpoint condition is set for any or all states of the state machine.

3. The method of claim 1 , wherein the state machine checks the control register after transitioning from one state to another state to determine if the breakpoint condition is set in the control register.

4. The method of claim 1 wherein the processor for the ASIC is an embedded processor.

5. The method of claim 1 , further comprising setting additional breakpoint conditions for a plurality of additional states for a plurality of additional state machines and the processor performs a plurality of additional tasks associated with the plurality of additional states.

6. The method of claim 1 , wherein the problem is discovered with the particular task for the state during an ASIC testing operation.

7. An Application Specific Integrated Circuit (ASIC), comprising:

a state machine that executes a plurality of tasks associated with a plurality of states; and

a processor that runs in parallel with the state machine;

wherein a status register passes control to the processor from the state machine after a breakpoint condition associated with a state is encountered, where the breakpoint condition is pre-set for the state of the state machine by setting a bit in a control register after a problem is discovered with a particular task for the state; and

the processor performs the task which was meant to be performed by the state machine and control is transferred to the state machine after the processor performs the task.

8. The ASIC of claim 7 , wherein the breakpoint condition is set for any or all states of the state machine.

9. The ASIC of claim 7 , wherein after transitioning from one state to another state, the state machine checks the control register to determine if a breakpoint condition is set for a current state.

10. The ASIC of claim 7 , wherein the processor is an embedded processor that accesses a random access memory to execute instructions.

11. The ASIC of claim 7 , further comprising setting additional breakpoint conditions for a plurality of additional states for a plurality of additional state machines and the processor performs a plurality of additional tasks associated with the plurality of additional states.

12. The ASIC of claim 7 , wherein the problem is discovered with the particular task for the state during an ASIC testing operation.

13. A method for designing an application specific integrated circuit (ASIC) with a hardware state machine and a processor, comprising:

setting a breakpoint condition for a state machine state by programming a control register in the ASIC;

using a status register to pass control to the processor after the breakpoint condition is encountered, wherein the state machine passes control to the processor after the state machine detects that the breakpoint condition has occurred for the state;

the processor performing a task associated with the state, wherein the task was meant to be performed by the state machine but a problem was discovered with the particular task for the state; and

transferring control back to the state machine after the processor performs the task associated with the state;

wherein the ASIC comprises the hardware state machine and the processor in a single component.

14. The method of claim 13 , wherein the breakpoint condition is set for any or all states of the state machine.

15. The method of claim 13 , wherein the state machine checks the control register after transitioning from one state to another state to deter nine if the breakpoint condition is set.

16. The method of claim 13 , wherein the processor for the ASIC is an embedded processor.

17. The method of claim 13 , wherein further comprising setting additional breakpoint conditions for a plurality of additional states for a plurality of additional state machines and the processor performs a plurality of additional tasks associated with the plurality of additional states.

18. The method of claim 13 , wherein the problem is discovered with the particular task for the state during a functional test to determine if the state machine can perform one or more tasks associated with one or more states of the state machine.