Method for forming a planar and vertical semiconductor structure having a strained semiconductor layer
View Patent ↗Forming a semiconductor structure includes providing a substrate having a strained semiconductor layer overlying an insulating layer, providing a first device region for forming a first plurality of devices having a first conductivity type, providing a second device region for forming a second plurality of devices having a second conductivity type, and thickening the strained semiconductor layer in the second device region so that the strained semiconductor layer in the second device region has less strain that the strained semiconductor layer in the first device region. Alternatively, forming a semiconductor structure includes providing a first region having a first conductivity type, forming an insulating layer overlying at least an active area of the first region, anisotropically etching the insulating layer, and after anisotropically etching the insulating layer, deposing a gate electrode material overlying at least a portion of the insulating layer.
1. A method for forming a semiconductor structure, the method comprising:
providing a substrate, said substrate comprising a strained semiconductor layer overlying an insulating layer;
providing a first device region for forming a first plurality of devices having a first conductivity type;
providing a second device region for forming a second plurality of devices having a second conductivity type, wherein the second conductivity type is different than the first conductivity type;
wherein the first plurality of devices comprise planar devices and the second plurality of devices comprise vertical devices;
thickening the strained semiconductor layer in the second device region to form a thickened strained semiconductor layer so that the thickened strained semiconductor layer in the second device region has less strain than the strained semiconductor layer in the first device region;
wherein said step of thickening comprises: epitaxially growing a same semiconductor material as the strained semiconductor layer directly on the strained semiconductor layer to form the thickened semiconductor layer;
wherein said step of thickening comprises: forming a masking layer overlying the first device region, and performing selective epitaxial growth to thicken the strained semiconductor layer in the second device region and not in the first device region;
wherein a thickness of a portion of the strained semiconductor layer which is epitaxially grown is thicker than a thickness of the masking layer; and
forming the first plurality of devices in the first device region and the second plurality of devices in the second device region, wherein source/drain regions of the first plurality of devices are formed within the strained semiconductor layer and source/drain regions of the second plurality of devices are formed within the thickened strained semiconductor layer, wherein said step of forming the second plurality of devices in the second device region comprises:
after said step of thickening the strained semiconductor layer in the second device region, removing portions of the thickened strained semiconductor layer to expose the insulating layer; and
after said step of removing the portions of the thickened strained semiconductor layer, forming a gate dielectric layer adjacent sidewalls of the thickened strained semiconductor layer.
2. A method as in claim 1 , further comprising:
performing no thickening of the strained semiconductor layer in the first device region.
3. A method as in claim 1 , wherein said substrate comprises an SSOI (strained semiconductor on insulator) substrate.
4. A method as in claim 1 , wherein the first conductivity type is n-type and the second conductivity type is p-type.
5. A method as in claim 1 , wherein a crystal orientation of the strained semiconductor layer for the planar devices comprises (100), and wherein a crystal orientation for the strained semiconductor for the vertical devices comprises (110).
6. A method as in claim 1 , wherein the vertical devices comprise FinFET devices.
7. A method as in claim 1 , wherein the selective epitaxial growth is performed at a temperature in a range of approximately 400-950 degrees Celsius.
8. A method as in claim 1 , further comprising:
after said step of performing selective epitaxial growth, thermally treating the semiconductor structure at a temperature in a range of approximately 400-1200 degrees Celsius.
9. A method as in claim 1 , further comprising:
after said step of performing selective epitaxial growth, thermally treating the semiconductor structure in an ambient comprising a chemistry selected from the group consisting of hydrogen and hydrochloric acid.
10. A method as in claim 1 , wherein a tensile stress of the strained semiconductor layer in the first device region is greater than 1.0 Giga Pascals.
11. A method as in claim 1 , wherein a tensile stress of the strained semiconductor layer in the second device region is approximately zero Giga Pascals.
12. A method as in claim 1 , wherein the first plurality of devices comprise n-channel devices and the second plurality of devices comprise p-channel devices.
13. A method as in claim 1 , further comprising:
forming an insulating layer overlying at least an active area of the first device region;
anisotropically etching the insulating layer; and
after anisotropically etching the insulating layer, depositing a gate electrode material overlying at least a portion of the insulating layer.
14. A method for forming a semiconductor structure, the method comprising:
providing a substrate, said substrate comprising a strained semiconductor layer overlying an insulating layer;
providing a first device region wherein providing comprises forming a first plurality of devices having a first conductivity type;
providing a second device region wherein providing comprises forming a second plurality of devices having a second conductivity type, wherein the second conductivity type is different than the first conductivity type;
wherein the first plurality of devices comprise planar devices and the second plurality of devices comprise vertical devices;
epitaxially growing the strained semiconductor layer in the second device region to form a thickened semiconductor layer when forming the second plurality of devices without epitaxially growing the strained semiconductor layer in the first device region when forming the first plurality of devices, wherein forming the second plurality of devices comprises forming source/drain regions of the second plurality of devices within the thickened semiconductor layer in the second device region and forming the first plurality of devices comprises forming source/drain regions of the first plurality of devices within the strained semiconductor layer in the first device region, wherein forming the second plurality of devices in the second region comprises:
after said step of epitaxially growing the strained semiconductor layer in the second device region, removing portions of the thickened strained semiconductor layer to expose the insulating layer; and
after said step of removing the portions of the thickened strained semiconductor layer, forming a gate dielectric layer adjacent sidewalls of the thickened strained semiconductor layer;
wherein said step of epitaxially growing comprises: forming a masking layer overlying the first device region, and performing selective epitaxial growth to thicken the strained semiconductor layer in the second device region and not in the first device region; and
wherein a thickness of a portion of the strained semiconductor layer which is epitaxially grown is thicker than a thickness of the masking layer.
15. A method as in claim 14 , wherein the strained semiconductor layer in the second device region has less tensile stress than the strained semiconductor layer in the first device region.
16. A method for forming a semiconductor structure, the method comprising:
providing a substrate, said substrate comprising a strained semiconductor layer overlying an insulating layer;
providing a first device region wherein providing comprises forming a first plurality of devices having a first conductivity type;
providing a second device region wherein providing comprises forming a second plurality of devices having a second conductivity type, wherein the second conductivity type is different than the first conductivity type;
wherein the first plurality of devices comprise planar devices and the second plurality of devices comprise vertical devices;
epitaxially growing the strained semiconductor layer in the second device region to form a thickened semiconductor layer when forming the second plurality of devices, wherein forming the second plurality of devices comprises forming source/drain regions of the second plurality of devices within the thickened semiconductor layer in the second device region and forming the first plurality of devices comprises forming source/drain regions of the first plurality of devices within the strained semiconductor layer in the first device region;
wherein said step of epitaxially growing comprises: forming a masking layer overlying the first device region, and performing selective epitaxial growth to thicken the strained semiconductor layer in the second device region and not in the first device region;
wherein a thickness of a portion of the strained semiconductor layer which is epitaxially grown is thicker than a thickness of the masking layer;
forming an insulating layer overlying at least an active area of the first device region;
anisotropically etching the insulating layer; and
depositing a gate electrode material overlying at least a portion of the insulating layer after anisotropically etching the insulating layer.
17. A method as in claim 14 , wherein said step of epitaxially growing the strained semiconductor layer in the second device region comprises:
epitaxially growing a same semiconductor material as the strained semiconductor layer directly on the strained semiconductor layer to form the thickened semiconductor layer.