IP Library Granted Patent US 7,604,750
Granted Patent B2
US 7,604,750 · App. 11/282,810 · Granted Oct 20, 2009

Method for fabricating semiconductor device

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Quick Facts
Patent No.
US 7,604,750
App. No.
11/282,810
Granted
Oct 20, 2009
Kind
B2
Abstract

A method for fabricating a semiconductor device is provided. The method includes: loading a wafer into a chamber including a ceramic dome coated with a material having etch tolerance against a plasma; etching a gate structure formed on the wafer, thereby generating etch remnants; and removing the etch remnants by using a gas of SF 6 as a main etch gas.

Claims (21)

1. A method for fabricating a semiconductor device, comprising:

loading a wafer into a chamber including vertical sidewalls and a curved ceramic dome coated with a material having etch tolerance against a plasma, wherein the material is yttrium oxide;

etching a gate structure formed on the wafer, thereby generating etch remnants;

and removing the etch remnants by:

using a gas of SF6 as a main etch gas, and

wherein the vertical sidewalls and the curved ceramic dome are uniformly cleaned using a multi-step cleaning process including a plurality of steps in which the removing of the etch remnants on the curved ceramic dome is performed at pressures lower than that on the vertical sidewalls,

wherein the removing of the etch remnants is performed under a source power of approximately 1,600 W supplied to an antenna coil and different pressures ranging from approximately 3 mTorr to approximately 90 mTorr,

wherein the vertical sidewalls are cleaned from positions progressing along the vertical sidewalls in multiple steps, and wherein the chamber pressure is reduced in each of the multiple steps.

2. The method of claim 1 , wherein the removing of the etch remnants is carried out by employing a dry cleaning process using a mixture gas obtained by mixing the SF 6 gas with oxygen (O 2 ) gas.

3. The method of claim 1 , wherein the mixture gas is supplied for approximately 50 seconds at a source power of approximately 1,600 W and a bias power of approximately 50 W.

4. A method for fabricating a semiconductor device, comprising:

loading a wafer into a chamber including vertical sidewalls and a curved ceramic dome coated with a material having etch tolerance against a plasma, wherein the material is yttrium oxide or diyttrium trioxide;

etching a gate structure formed on the wafer, thereby generating etch remnants; and removing the etch remnants by:

using a gas of SF6 as a main etch gas, and

performing a recovery process,

wherein the vertical sidewalls and the curved ceramic dome are uniformly cleaned using a multi-step cleaning process including a plurality of steps in which the removing of the etch remnants on the curved ceramic dome is performed at pressures lower than that on the vertical sidewalls,

wherein the removing of the etch remnants is performed under a source power of approximately 1,600 W supplied to an antenna coil and different pressures ranging from approximately 3 mTorr to approximately 90 mTorr,

wherein the sidewalls are cleaned from positions progressing along the vertical sidewalls in multiple steps, and wherein the chamber pressure is reduced in each of the multiple steps.

5. The method of claim 4 , wherein the removing of the etch remnants is carried out by employing a dry cleaning process using a mixture gas obtained by mixing the SF6 gas with oxygen (O 2 ) gas.

6. The method of claim 4 , wherein the mixture gas is supplied for approximately 50 seconds at a source power of approximately 1,600 W and a bias power of approximately 50 W.

7. The method of claim 4 , wherein the performing of the recovery process is carried out by: supplying a source power of approximately 500 W and a bias power of approximately 80 W at a pressure of approximately 10 mTorr; and supplying hydrogen bromide (HBr) gas of approximately 100 sccm, helium (He) gas of approximately 40 sccm and oxygen (O 2 ) gas of approximately 1 sccm for approximately 100 seconds.

Assignments (5)
CHANGE OF NAME Recorded Mar 12, 2024
From: KEY FOUNDRY CO., LTD.
To: SK KEYFOUNDRY INC.
Reel/Frame 066794/0290 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 3, 2020
From: MAGNACHIP SEMICONDUCTOR, LTD.
To: KEY FOUNDRY CO., LTD.
Reel/Frame 053703/0227 →
RELEASE OF SECURITY INTEREST Recorded Aug 12, 2013
From: U.S. BANK NATIONAL ASSOCIATION
To: MAGNACHIP SEMICONDUCTOR LTD.
Reel/Frame 030988/0419 →
AFTER-ACQUIRED INTELLECTUAL PROPERTY KUN-PLEDGE AGREEMENT Recorded Feb 18, 2009
From: MAGNACHIP SEMICONDUCTOR, LTD.
To: U.S. BANK NATIONAL ASSOCIATION, AS COLLATERAL TRUSTEE
Reel/Frame 022277/0133 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 18, 2005
From: SHIN, KYOUNG-CHOUL; MUN, SEONG-YEOL
To: MAGNACHIP SEMICONDUCTOR, LTD.
Reel/Frame 017264/0115 →