IP Library Granted Patent US 7,533,326
Granted Patent B2
US 7,533,326 · App. 11/295,318 · Granted May 12, 2009

Adaptive decoder for decoding an asynchronous data stream

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Quick Facts
Patent No.
US 7,533,326
App. No.
11/295,318
Granted
May 12, 2009
Kind
B2
Abstract

A data decoder for decoding an asynchronous incoming data stream includes a bit engine receiving information describing the incoming data stream and generating a decoded data stream. In one embodiment, the bit engine includes a best-fit bit analysis block performing a pattern match operation for each data bit of the incoming data stream using the information describing the incoming data stream. The best-fit bit analysis block is operative to find a pattern of data bits that best matches the data bits in the incoming data stream. The bit engine further includes a missing bit insertion block to insert a dummy bit for each data bit where the best-fit bit analysis block cannot find a pattern match. An error correction block performs forward error correction on the decoded data stream, including the dummy bits, to generate a corrected outgoing data stream.

Claims (40)

1. A data decoder for decoding an asynchronous incoming data stream, the data decoder comprising:

an incoming data processing block for receiving the incoming data stream and analyzing the incoming data stream to generate information describing the incoming data stream;

a bit engine receiving the information describing the incoming data stream and generating a decoded data stream, the bit engine comprising:

a best-fit bit analysis block performing a pattern match operation for each data bit of the incoming data stream using the information describing the incoming data stream, the best-fit bit analysis block operative to find a pattern of data bits that best matches the data bits in the incoming data stream; and

a missing bit insertion block to insert a dummy bit for each data bit where the best-fit bit analysis block cannot find a pattern match; and

an error correction block receiving the decoded data stream and performing forward error correction on the decoded data stream, the error correction block generating a corrected outgoing data stream having corrected data values.

2. The data decoder of claim 1 , wherein the incoming data stream comprises an encoded data stream.

3. The data decoder of claim 2 , wherein the incoming data stream comprises a data stream encoded using the Manchester coding scheme.

4. The data decoder of claim 3 , wherein the incoming data processing block comprises an edge detect and integrator block for detecting and isolating the positive-going edges and the negative-going edges of the incoming data stream and also for measuring the duration of successive high/low transitions.

5. The data decoder of claim 4 , wherein the incoming data processing block further comprises a pulse deglitch and reshape block for performing filtering functions on the incoming data stream.

6. The data decoder of claim 1 , further comprising:

a dead bitstream timer for counting the number of dummy bits inserted consecutively by the missing bit insertion block, the dead bitstream timer asserting a signal when the number of dummy bits inserted consecutively reaches a predetermined limit, the signal operative to terminate the decoding of the incoming data stream and instruct the bit engine to reject the incoming data stream as invalid.

7. The data decoder of claim 6 , wherein the predetermined limit of the dead bitstream timer comprises a number of corrupted data bits in a row exceeding the error correction capability of the error correction block.

8. The data decoder of claim 6 , wherein the predetermined limit is 10 dummy bits.

9. The data decoder of claim 1 , wherein the dummy bit has a data value of one or zero.

10. The data decoder of claim 1 , further comprising:

a data register for storing the decoded data stream; and

a sync pattern detect block for detecting specific sequences of valid bits in the decoded data stream.

11. A method of decoding an asynchronous incoming data stream comprising:

receiving the incoming data stream;

analyzing the incoming data stream;

generating information describing the incoming data stream;

performing a pattern match for each data bit of the incoming data stream using the information describing the incoming data stream;

determining a pattern of data bits that best matches the data bits in the incoming data stream using best-fit bit analysis;

inserting a dummy bit for each data bit where the best-fit bit analysis cannot find a pattern match, thereby generating a decoded data stream; and

correcting errors in the decoded data stream using forward error correction routines to generate an outgoing data stream having corrected data values.

12. The method of claim 11 , wherein the incoming data stream comprises an encoded data stream.

13. The method of claim 12 , wherein the incoming data stream comprises a data stream encoded using the Manchester coding scheme.

14. The method of claim 13 , wherein analyzing the incoming data stream comprises:

detecting and isolating the positive-going edges and the negative-going edges of the incoming data stream; and

measuring the duration of successive high/low transitions.

15. The method of claim 14 , wherein analyzing the incoming data stream further comprises:

filtering the incoming data stream prior to detecting and isolating the positive-going edges and the negative-going edges of the incoming data stream.

16. The method of claim 11 , further comprising:

counting the number of dummy bits inserted consecutively;

asserting a signal when the number of dummy bits inserted consecutively reaches a predetermined limit; and

terminating the decoding of the incoming data stream and rejecting the incoming data stream as invalid as a result of the signal being asserted.

17. The method of claim 16 , wherein the predetermined limit of the dead bitstream timer comprises a number of corrupted data bits in a row exceeding the error correction capability of the error correction routines.

18. The method of claim 17 , wherein the predetermined limit is 10 dummy bits.

19. The method of claim 11 , wherein the dummy bit has a data value of one or zero.

Assignments (10)
INTELLECTUAL PROPERTY BUY-IN AGREEMENT/ASSIGNMENT Recorded Apr 4, 2023
From: MICREL LLC
To: MICROCHIP TECHNOLOGY INCORPORATED
Reel/Frame 063241/0771 →
RELEASE OF SECURITY INTEREST Recorded Mar 14, 2022
From: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS NOTES COLLATERAL AGENT
To: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
Reel/Frame 060894/0437 →
RELEASE OF SECURITY INTEREST Recorded Mar 11, 2022
From: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS NOTES COLLATERAL AGENT
To: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
Reel/Frame 059363/0001 →
RELEASE OF SECURITY INTEREST Recorded Mar 10, 2022
From: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS NOTES COLLATERAL AGENT
To: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
Reel/Frame 059863/0400 →
SECURITY INTEREST Recorded Jun 4, 2021
From: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
To: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS NOTES COLLATERAL AGENT
Reel/Frame 057935/0474 →
SECURITY INTEREST Recorded Dec 24, 2020
From: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
To: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS COLLATERAL AGENT
Reel/Frame 055671/0612 →
SECURITY INTEREST Recorded Jun 5, 2020
From: MICROCHIP TECHNOLOGY INC.; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
To: WELLS FARGO BANK, NATIONAL ASSOCIATION
Reel/Frame 053468/0705 →
RELEASE OF SECURITY INTEREST Recorded May 30, 2020
From: JPMORGAN CHASE BANK, N.A, AS ADMINISTRATIVE AGENT
To: MICROCHIP TECHNOLOGY INC.; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
Reel/Frame 053466/0011 →
SECURITY INTEREST Recorded Apr 24, 2020
From: MICROCHIP TECHNOLOGY INC.; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
To: JPMORGAN CHASE BANK, N.A., AS ADMINISTRATIVE AGENT
Reel/Frame 053311/0305 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 6, 2005
From: CHAMBERS, PETER
To: MICREL, INC.
Reel/Frame 017328/0893 →