IP Library Granted Patent US 7,495,887
Granted Patent B2
US 7,495,887 · App. 11/304,779 · Granted Feb 24, 2009

Capacitive devices, organic dielectric laminates, and printed wiring boards incorporating such devices, and methods of making thereof

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Quick Facts
Patent No.
US 7,495,887
App. No.
11/304,779
Granted
Feb 24, 2009
Kind
B2
Abstract

A polymeric dielectric composition is disclosed, having a paraelectric filler with a dielectric constant between 50 and 150. Such compositions are well suited for electronic circuitry, such as, multilayer printed circuits, flexible circuits, semiconductor packaging and buried film capacitors.

Claims (13)

1. A capacitor consisting essentially of a dielectric composition comprising a paraelectric filler and a polymeric material said dielectric composition disposed between two conductive electrodes;

wherein said filler has a dielectric constant between 50 and 150;

wherein said paraelectric filler is selected from the group consisting of Ta 2 O 5 , Hf 2 O 5 , Nb 2 O 5 , Steatite and mixtures thereof, and

wherein said paraelectric filler is present in an amount of 5 to 55 volume percent.

2. The capacitor of claim 1 wherein the average particle size of said paraelectric filler is less than 2 microns.

3. The capacitor of claim 1 wherein said polymer is selected from an epoxy, acrylic, polyurethane and polyimide.

4. The capacitor of claim 1 further comprising a ferroelectric filler.

5. The capacitor of claim 4 wherein said ferroelectric filler is selected from the group consisting of perovskites of the general formula ABO 3 , crystalline barium titanate (BT), barium strontium titanate (BST), lead zirconate titanate (PZT), lead lanthanum titanate, lead lanthanum zirconate titanate (PLZT), lead magnesium niobate (PMN), calcium copper titanate and mixtures thereof.

6. The capacitor of claim 1 wherein said composition has been processed to form a film.

7. A method of forming an embedded planar capacitor comprising:

providing the dielectric composition of claim 1 ; applying said dielectric composition of claim 1 to a first metallic layer, thus forming a metallic side and a dielectric side; and applying a second metallic layer to said dielectric side.

8. An embedded planar capacitor formed by the method of claim 7 .

9. A printed wiring board comprising the capacitor of claim 1 .

Assignments (4)
SECURITY INTEREST Recorded Nov 3, 2025
From: QNITY ELECTRONICS, INC.
To: JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT
Reel/Frame 073515/0243 →
SECURITY INTEREST Recorded Nov 3, 2025
From: QNITY ELECTRONICS, INC.
To: U.S. BANK TRUST COMPANY, NATIONAL ASSOCIATION, AS NOTES COLLATERAL AGENT
Reel/Frame 073517/0298 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 25, 2019
From: E. I. DU PONT DE NEMOURS AND COMPANY
To: DUPONT ELECTRONICS, INC.
Reel/Frame 049583/0269 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 13, 2006
From: COX, G. SIDNEY
To: E. I. DU PONT DE NEMOURS AND COMPANY
Reel/Frame 017299/0671 →