Transistor with immersed contacts and methods of forming thereof
View Patent ↗A method includes forming a semiconductor structure, the semiconductor structure includes a first current electrode region, a second current electrode region, and a channel region, the channel region is located between the first current electrode region and the second current electrode region, wherein the channel region is located in a fin structure of the semiconductor structure, wherein a carrier transport in the channel region is generally in a horizontal direction between the first current electrode region and the second current electrode region. The method further includes forming a first contact, wherein forming the first contact includes removing a first portion of the semiconductor structure to form an opening, wherein the opening is in the first current electrode region and forming contact material in the opening.
1. A method for forming a semiconductor device comprising:
forming a semiconductor structure on a substrate, wherein the semiconductor structure comprises a first current electrode region, a second current electrode region, and a fin structure between the first current electrode region and the second current electrode region, wherein a channel region is located in the fin structure, and a carrier transport in the channel region is generally in a horizontal direction between the first current electrode region and the second current electrode region;
forming a gate structure over the fin structure and the substrate;
forming a first contact within the gate structure, wherein forming the first contact includes:
removing a first portion of the gate structure to form a first opening in the gate structure that extends from a top of the gate structure to the substrate, and
forming contact material in the first opening to form the first contact within the gate structure, wherein sidewalls of the first contact are completely surrounded by the gate structure, and
wherein the first contact is electrically coupled to the gate structure.
2. The method of claim 1 further comprising:
forming a second contact within the first current electrode region, wherein forming a second contact includes:
removing a second portion of the first current electrode region to form a second opening in the first current electrode region that extends from a top of the first current electrode region to the substrate; and
forming contact material in the second opening to form the second contact within the first current electrode region, wherein sidewalls of the second contact are completely surrounded by the first current electrode region and the second contact is electrically coupled to the first current electrode region.
3. The method of claim 1 , wherein forming contact material in the first opening further includes:
forming a barrier layer material in the first opening; and
forming a second material in the first opening subsequent to forming the barrier layer material.
4. The method of claim 1 , wherein removing a first portion of the gate structure further includes:
forming a layer of dielectric material over the gate structure;
etching a second opening in the layer of dielectric material; and
etching the first portion of the gate structure through the second opening to remove the first portion of the gate structure.
5. The method of claim 1 , wherein the first opening is defined by a sidewall of the gate structure, the method further comprising:
forming a silicide on the sidewall prior to forming contact material in the first opening.
6. A method comprising:
forming a semiconductor structure on a substrate, the semiconductor structure includes a first current electrode region, a second current electrode region, a gate, and a channel region, the channel region is located between the first current electrode region and the second current electrode region, wherein the channel region is located in a fin structure of the semiconductor structure, wherein a carrier transport in the channel region is generally in a horizontal direction between the first current electrode region and the second current electrode region; and
forming a first contact, wherein forming the first contact includes:
removing a first portion of the gate to form a first opening, wherein the first opening extends from a top of the gate to the substrate; and
forming contact material in the opening to form the first contact within the gate, wherein sidewalls of the first contact are completely surrounded by the gate.
7. A method for forming a semiconductor device comprising:
forming a gate structure on a substrate; and
forming a first contact, wherein forming the first contact includes:
removing a first portion of the gate structure to form a first opening in the gate structure that extends from a top of the gate structure to the substrate; and
forming contact material in the first opening to form the first contact within the gate structure, wherein sidewalls of the first contact are completely surrounded by the gate structure;
wherein the first contact is electrically coupled to the gate structure.
8. The method of claim 7 , wherein the substrate is an insulator, and wherein removing the first portion includes removing material of the gate structure to expose the insulator.
9. The method of claim 7 , wherein the first contact has a rectangular cross-sectional shape.
10. The method of claim 7 , wherein removing a first portion further includes:
forming a layer of dielectric material over the gate structure;
etching a second opening in the layer of dielectric material; and
etching the first portion of the gate structure through the second opening to remove the first portion.
11. The method of claim 7 , wherein the semiconductor device further comprises:
a first current electrode region;
a second current electrode region; and
a channel region between the first current electrode region and the second current electrode region, the channel region located in a fin structure, wherein a carrier transport in the channel region is generally in a horizontal direction between the first current electrode region and the second current electrode region, and the gate structure overlies the fin structure.
12. The method of claim 7 , further comprising:
forming a second contact, wherein forming a second contact includes:
removing a second portion of the first current electrode region to form a second opening in the first current electrode region; and
forming contact material in the second opening;
wherein the second contact is electrically coupled to the first current electrode region.
13. The method of claim 7 , wherein the first contact has a tapered cross-sectional shape having a first width at a top of the first contact and a second width at a bottom of the first contact.
14. The method of claim 1 , wherein removing the first portion of the gate structure further includes:
forming a layer of dielectric material over the gate structure;
etching a third opening in the layer of dielectric material; and
etching the first portion of the gate structure through the third opening to remove the first portion of the gate structure.
15. The method of claim 2 further comprising:
forming a third contact within the second current electrode region, wherein forming a third contact includes:
removing a third portion of the second current electrode region to form a third opening in the second current electrode region that extends from a top of the second current electrode region to the substrate; and
forming contact material in the third opening to form the third contact within the second current electrode region, wherein sidewalls of the third contact are completely surrounded by the second current electrode region and the third contact is electrically coupled to the second current electrode region.
16. The method of claim 12 , further comprising:
forming a third contact, wherein forming a third contact includes:
removing a third portion of the second current electrode region to form a third opening in the second current electrode region that extends from a top of the second current electrode region to the substrate; and
forming contact material in the third opening, wherein sidewalls of the third contact are completely surrounded by the second current electrode region and the third contact is electrically coupled to the second current electrode region.