IP Library Granted Patent US 7,449,359
Granted Patent B2
US 7,449,359 · App. 11/319,570 · Granted Nov 11, 2008

Fabricating method of CMOS image sensor

View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 7,449,359
App. No.
11/319,570
Granted
Nov 11, 2008
Kind
B2
Abstract

A fabricating method of a CMOS image sensor is disclosed, by which a light condensing effect is enhanced by providing an inner microlens to a semiconductor substrate. The CMOS image sensor includes a plurality of photodiodes on a semiconductor substrate, a plurality of inner microlenses on a plurality of the photodiodes, an insulating interlayer on a plurality of the inner microlenses, a plurality of metal lines within the insulating interlayer, a device protecting layer on the insulating interlayer, and a plurality of microlenses on the device protecting layer.

Claims (15)

1. A method of fabricating a CMOS image sensor, comprising:

forming a plurality of photodiodes on a semiconductor substrate;

alternately forming first insulating interlayers and first metal lines on a plurality of the photodiodes to thereby form the first insulating interlayer on the first metal line;

forming a plurality of inner microlenses on the first insulating interlayer;

alternately forming second insulating interlayers and second metal lines on a plurality of the inner microlenses to thereby form the second insulating interlayer on the second metal line;

forming a device protecting layer on the second insulating interlayer; and

forming a plurality of microlenses on the device protecting layer;

wherein forming a plurality of inner microlenses comprises:

attaching a silicon layer on the first insulating layer wherein oxide layers are coated on top and bottom surfaces of the silicon layer, respectively;

forming a photoresist pattern on the silicon layer to expose an area corresponding to a plurality of the photodiodes;

forming concave recesses by wet etching performed on the silicon layer using the photoresist pattern as a mask; and

forming a nitride layer on the semiconductor substrate including the concave recesses;

wherein forming concave recesses comprises:

generating an inverse triangle type profile by performing the wet etching on the silicon layer;

removing an oxide layer from a top surface of the silicon layer; and rounding the inverse triangle type profile by chemical dry etching to form each of the concave recesses.

Assignments (8)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 27, 2021
From: CAVIUM INTERNATIONAL
To: MARVELL ASIA PTE LTD.
Reel/Frame 057336/0873 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 25, 2021
From: MARVELL TECHNOLOGY CAYMAN I
To: CAVIUM INTERNATIONAL
Reel/Frame 057279/0519 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 23, 2021
From: INPHI CORPORATION
To: MARVELL TECHNOLOGY CAYMAN I
Reel/Frame 056649/0823 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 22, 2017
From: DONGBU HITEK, CO., LTD.
To: INPHI CORPORATION
Reel/Frame 041342/0946 →
CORRECTIVE ASSIGNMENT TO CORRECT REMOVE PATENT NO. 878209 FROM EXHIBIT B PREVIOUSLY RECORDED AT REEL: 034009 FRAME: 0157. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT. Recorded Oct 24, 2014
From: DONGBU HITEK, CO., LTD.
To: INPHI CORPORATION
Reel/Frame 034087/0097 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 15, 2014
From: DONGBU HITEK, CO., LTD.
To: INPHI CORPORATION
Reel/Frame 034009/0157 →
CHANGE OF NAME Recorded Jun 15, 2006
From: DONGBUANAM SEMICONDUCTOR INC.
To: DONGBU ELECTRONICS CO., LTD.
Reel/Frame 018176/0351 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 29, 2005
From: SEO, DONG HEE; CHOI, CHEE HONG
To: DONGBUANAM SEMICONDUCTOR INC.
Reel/Frame 017426/0107 →