IP Library Granted Patent US 7,417,475
Granted Patent B2
US 7,417,475 · App. 11/320,846 · Granted Aug 26, 2008

Circuit and method for generating power up signal

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Quick Facts
Patent No.
US 7,417,475
App. No.
11/320,846
Granted
Aug 26, 2008
Kind
B2
Abstract

There is provided a circuit and a method for generating a power up signal. The circuit for generating a power up signal, includes an external power voltage divider for dividing a magnitude of an external power voltage so as to output the divided voltage, an external power voltage detector for activating a detection signal when the output voltage of the external power voltage divider reaches a preset level, and a power up signal generator for outputting a power up signal according to the detection signal and a first internal power voltage. Herein, the power up signal is generated when the internal power voltage as well as the external power voltage reaches a sufficient level so that a power up signal skew may be reduced to stabilize its operation and enhance reliability of a device.

Claims (27)

1. A circuit for generating a power up signal, comprising:

an external power voltage divider for dividing a magnitude of an external power voltage so as to output the divided external power voltage;

an external power voltage detector for activating a detection signal when the output voltage of the external power voltage divider reaches a preset level; and

a power up signal generator for outputting a power up signal according to the detection signal and a first internal power voltage,

wherein the power up signal generator includes an internal power voltage divider for dividing a second internal power voltage so as to output the divided second internal power as the first internal power voltage,

wherein the internal power voltage divider includes: a plurality of resistors connected in series between the second internal power voltage and a ground voltage, for dividing the second internal power voltage; and at least one fuse connected to at least one resistor in parallel among the plurality of the resistors.

2. The apparatus as recited in claim 1 , further comprising a level controller for stabilizing the output voltage of the external power voltage divider, which is operated when the output voltage of the external power voltage divider reaches a predetermined level.

3. The apparatus as recited in claim 1 , wherein the internal power voltage divider includes a plurality of MOS transistors connected in series between the second internal power voltage and the ground voltage, for dividing the second internal power voltage.

4. The apparatus as recited in claim 1 , wherein the external power voltage divider includes a plurality of resistors connected in series between the external power voltage and the ground voltage.

5. The apparatus as recited in claim 1 , wherein the external power voltage divider includes a resistor and an MOS diode connected to each other in series between the external power voltage and the ground voltage.

6. The apparatus as recited in claim 5 , wherein the external power voltage detector activates the detection signal when the output voltage of the external power voltage divider makes the MOS diode turned on.

7. A circuit for generating a power up signal, comprising:

an external power voltage divider for dividing a magnitude of an external power voltage so as to output the divided external power voltage;

an external power voltage detector for activating a detection signal when the output voltage of the external power voltage divider reaches a preset level; and

a power up signal generator for outputting a power up signal according to the detection signal and a first internal power voltage,

wherein the power up signal generator include:

a pull-up unit for pulling-up a node for outputting the power up signal

a pull-down unit for pulling-down the node for outputting the power up signal; and

a control unit arranged between the pull-up unit and the pull-down unit to connect the first pull-up unit to the node in response to the first internal power voltage.

8. The apparatus as recited in claim 7 , further comprising a level controller for stabilizing the output voltage of the external power voltage divider, which is operated when the output voltage of the external power voltage divider reaches a predetermined level.

9. The apparatus as recited in claim 7 , wherein the power up signal generator includes an internal power voltage divider for dividing a second internal power voltage so as to output the divided second internal power voltage as the first internal power voltage.

10. The apparatus as recited in claim 9 , wherein the internal power voltage divider includes:

a plurality of resistors connected in series between the second internal power voltage and a ground voltage, for dividing the second internal power voltage; and

at least one fuse connected to at least one resistor in parallel among the plurality of the resistors.

11. The apparatus as recited in claim 10 , wherein the internal power voltage divider includes a plurality of MOS transistors connected in series between the second internal power voltage and the ground voltage, for dividing the second internal power voltage.

12. The apparatus as recited in claim 11 , wherein the external power voltage divider includes a resistor and an MOS diode connected to each other in series between the external power voltage and the ground voltage.

13. The apparatus as recited in claim 12 , wherein the external power voltage detector activates the detection signal when the output voltage of the external power voltage divider makes the MOS diode turned on.

Assignments (4)
CORRECTIVE ASSIGNMENT TO CORRECT THE ASSIGNEE IS HYNIX SEMICONDUCTOR INC. NOT HYNIX-SEMICONDUCTOR INC. THERE IS NO HYPHEN IN THE NAME. PREVIOUSLY RECORDED ON REEL 67328 FRAME 814. ASSIGNOR(S) HEREBY CONFIRMS THE CHANGE OF NAME. Recorded May 14, 2024
From: HYNIX SEMICONDUCTOR INC.
To: SK HYNIX INC.
Reel/Frame 067412/0482 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 9, 2024
From: SK HYNIX INC.
To: MIMIRIP LLC
Reel/Frame 067369/0832 →
CHANGE OF NAME Recorded May 6, 2024
From: HYNIX-SEMICONDUCTOR INC.
To: SK HYNIX INC.
Reel/Frame 067328/0814 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 30, 2005
From: BYEON, SANG-JIN; PARK, KEE-TEOK
To: HYNIX SEMICONDUCTOR INC.
Reel/Frame 017398/0435 →