Method of manufacturing a semiconductor device
View Patent ↗For a semiconductor device having copper wiring, an exemplary method according to an embodiment of the present invention may include forming a first insulation layer on a silicon substrate having a transistor thereon; forming a contact hole by etching the first insulation layer; forming a metal plug so as to fill the contact hole; forming a second insulation layer on the metal plug; forming a trench exposing an upper surface of the metal plug by partially removing the second insulation layer; sputter-etching an interior wall and bottom surface of the trench with a plasma; and forming a copper line layer so as to fill the sputter-etched trench. According to this method, electrical contact between a metal plug and a copper line layer may be maintained or improved prevented by reducing or removing by-products on the metal plug using the sputter-etching process.
1. A method of manufacturing a semiconductor device, comprising:
forming a metal plug in a contact hole in an underlying insulation layer on a substrate having a transistor thereon;
forming an overlying insulation layer on the underlying insulation layer;
forming a trench in the overlying insulation layer, exposing an upper surface of the metal and the underlying insulation layer;
sputter-etching the trench and the exposed upper surface of the metal plug with a plasma; and
forming a copper layer so as to fill the sputter-etched trench.
2. The method of claim 1 , wherein the metal plug further comprises a first barrier metal layer on an interior wall of the contact hole.
3. The method of claim 1 , wherein the plasma comprises Ar, NH 3 ,H 2 , N 2 , or a mixture thereof.
4. The method of claim 1 , wherein forming the trench comprises removing a part of the overlying insulation layer.
5. The method of claim 1 , further comprising forming the contact hole by etching the underlying insulation layer.
6. The method of claim 1 , further comprising forming a first barrier metal layer on an interior wall of the contact hole before forming the metal plug.
7. The method of claim 1 , wherein the upper surface of the metal plug has a width that is smaller than a width of a bottom of the trench.
8. The method of claim 1 , wherein the trench is sputter-etched with a plasma at a pressure less than or about 10E-7 Torr.
9. The method of claim 1 , further comprising forming an adhesive layer in the contact hole, wherein the adhesive layer comprises titanium or a silicide-forming metal.
10. The method of claim 1 , wherein the metal plug comprises a tungsten layer.
11. The method of claim 10 , wherein the plug is formed by chemical vapor deposition from WF 6 and SiH 4 .
12. The method of claim 1 , further comprising forming a second barrier metal layer on the interior wall of the trench after the sputter-etching.
13. The method of claim 12 , wherein forming the second barrier metal layer is conducted in a deposition chamber without a vacuum break after the sputter-etching.
14. The method of claim 1 , wherein the sputter-etching comprises applying a first RF power to the silicon substrate of 50-400 W, and applying a second RF power to an interior wall of a process chamber of 100-400 W.
15. The method of claim 14 , wherein a frequency of the first RF power is about 13.56 MHz or an integral multiple thereof, and a frequency of the second RF power is about 400 kilz or an integral multiple thereof.
16. The method of claim 1 , wherein:
the method further comprises forming a first barrier metal layer on an interior wall of the contact hole;
the metal plug comprises a tungsten layer on the first barrier metal layer;
the method further comprises forming a second barrier metal layer on an interior wall of the trench after the sputter-etching;
the plasma comprises Ar, NH 3 , H 2 . N 2 , or a mixture thereof; and
the sputter-etching comprises applying a first RF power to the silicon substrate of 50-400 W, and applying a second RF power to an interior wall of a process chamber of 100-400 W.
17. The method of claim 16 , wherein:
forming the second barrier metal layer is conducted in a deposition chamber without a vacuum break after sputter-etching; and
a frequency of the first RF power is about 13.56 MHz or an integral multiple thereof, and a frequency of the second RF power is about 400 kHz or an integral multiple thereof.
18. The method of claim 16 , further comprising forming a copper seed layer on the second barrier metal layer.
19. The method of claim 1 , wherein the substrate comprises silicon.
20. The method of claim 19 . further comprising forming the underlying insulation layer on the substrate.