IP Library Granted Patent US 7,495,420
Granted Patent B2
US 7,495,420 · App. 11/327,798 · Granted Feb 24, 2009

LDO with slaved switching regulator using feedback for maintaining the LDO transistor at a predetermined conduction level

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Quick Facts
Patent No.
US 7,495,420
App. No.
11/327,798
Granted
Feb 24, 2009
Kind
B2
Abstract

A voltage regulator is disclosed having a switching regulator portion and an LDO regulator portion on a single chip. The switching portion switches one or more transistors at a high frequency to supply a voltage to a terminal of a series transistor of an LDO regulator. A second terminal of the series transistor provides the output voltage of the LDO regulator. The LDO regulator controls the conductivity of the series transistor to regulate the LDO regulator output voltage to be a desired fixed value. To minimize power dissipation in the series transistor, a feedback signal is taken from the series transistor indicating the level of saturation of the series transistor. This feedback signal is used by the switching regulator to adjust the switching regulator's output voltage such that the voltage supplied to the series transistor is close to the output voltage of the LDO. If there is a change of current, temperature, or process variations, the switching regulator voltage will be adjusted accordingly to keep the series transistor at a desired level in saturation. By minimizing the voltage drop across the series transistor and operating the series transistor at an optimum level of saturation, the overall regulator is highly efficient.

Claims (28)

1. A voltage converter comprising:

a switching regulator portion having a differential amplifier with inputs including a first reference signal and a first feedback signal, the switching regulator varying a duty cycle to substantially match the first feedback signal to the first reference signal, the switching regulator generating a first output voltage;

a linear regulator portion controlling a series transistor to achieve a regulated second output voltage, a first terminal of the series transistor being coupled to the first output voltage of the switching regulator, a second terminal of the series transistor providing the regulated second output voltage; and

a feedback circuit generating the first feedback signal signifying a conductance level of the series transistor, the first feedback signal being applied to the switching regulator to raise or lower the first output voltage of the switching regulator to achieve a particular differential voltage across the series transistor such that the conductance of the series transistor is maintained in steady state at a predetermined conductance level irrespective of a level of the regulated second output voltage wherein the series transistor is a bipolar transistor, the feedback circuit maintaining the bipolar transistor at a certain level in saturation.

2. The converter of claim 1 wherein the second terminal of the series transistor is a first emitter of the bipolar transistor.

3. The converter of claim 2 wherein the bipolar transistor includes a second emitter, the first feedback signal being based on a current signal generated when the bipolar transistor is operating in a reverse mode with respect to the second emitter, causing the second emitter to draw current when the transistor is in saturation with respect to the second emitter.

4. The converter of claim 1 wherein the switching regulator is a PWM regulator.

5. The converter of claim 1 wherein the linear regulator comprises an error amplifier, the error amplifier receiving a second reference signal and a second feedback signal for generating an error signal related to the difference between the second reference signal and the second feedback signal, the linear regulator controlling the conductivity of the series transistor to substantially match the second feedback signal to the second reference signal.

6. The converter of claim 1 wherein the feedback circuit comprises:

a current mirror, a first leg of the current mirror generating a first current relating to a saturation level of the series transistor, a second leg of the current mirror generating a mirrored current corresponding to the first current; and

a resistance connected in series with the mirrored current, a voltage at a first node of the resistance being used to generate the first feedback signal for the switching regulator to adjust the first output voltage of the switching regulator.

7. The converter of claim 6 wherein the feedback circuit further comprises a second transistor in series between a terminal of the series transistor and the first leg of the current mirror.

8. The converter of claim 6 further comprising a substantially constant voltage coupled to a second node of the resistance.

9. The converter of claim 8 wherein the substantially constant voltage is a common voltage of the voltage converter.

10. The converter of claim 1 wherein the switching regulator further comprises a filter circuit having an output terminal providing the first output voltage of the switching regulator.

11. The converter of claim 1 wherein the conductance level is slightly in saturation.

12. A method for voltage conversion comprising:

varying a duty cycle of a switching voltage regulator to substantially match a first feedback signal to a first reference signal, the switching regulator generating a first output voltage;

controlling a series transistor by a linear regulator to achieve a regulated second output voltage, a first terminal of the series transistor being coupled to the first output voltage of the switching regulator, a second terminal of the series transistor providing the regulated second output voltage; and

generating the first feedback signal by a feedback circuit signifying a conductance level of the series transistor, the first feedback signal being applied to the switching regulator to raise or lower the first output voltage of the switching regulator to achieve a particular differential voltage across the series transistor such that the conductance of the series transistor is maintained in steady state at a predetermined conductance level irrespective of a level of the regulated second output voltage wherein the series transistor is a bipolar transistor, the feedback circuit maintaining the bipolar transistor at a certain level in saturation.

13. The method of claim 12 wherein the second terminal of the series transistor is a first emitter of the bipolar transistor.

14. The method of claim 13 wherein the bipolar transistor includes a second emitter, the first feedback signal being based on a current signal generated when the bipolar transistor is operating in a reverse mode with respect to the second emitter, causing the second emitter to draw current when the transistor is in saturation with respect to the second emitter.

15. The method of claim 12 wherein controlling the series transistor comprises an error amplifier in the linear regulator receiving a second reference signal and a second feedback signal for generating an error signal related to the difference between the second reference signal and the second feedback signal, the linear regulator controlling the conductivity of the series transistor to substantially match the second feedback signal to the second reference signal.

16. The method of claim 12 wherein generating the first feedback signal comprises:

a first leg of a current mirror generating a first current relating to a saturation level of the series transistor, a second leg of the current mirror generating a mirrored current corresponding to the first current; and

a resistance connected in series with the mirrored current creating a voltage at a first node of the resistance being used to generate the first feedback signal for the switching regulator to adjust the first output voltage of the switching regulator.

17. The method of claim 16 wherein generating the first feedback signal further comprises buffering the first current by a second transistor in series between a terminal of the series transistor and the first leg of the current mirror.

18. The method of claim 12 wherein the conductance level is slightly in saturation.

Assignments (10)
INTELLECTUAL PROPERTY BUY-IN AGREEMENT/ASSIGNMENT Recorded Apr 4, 2023
From: MICREL LLC
To: MICROCHIP TECHNOLOGY INCORPORATED
Reel/Frame 063241/0771 →
RELEASE OF SECURITY INTEREST Recorded Mar 14, 2022
From: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS NOTES COLLATERAL AGENT
To: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
Reel/Frame 060894/0437 →
RELEASE OF SECURITY INTEREST Recorded Mar 11, 2022
From: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS NOTES COLLATERAL AGENT
To: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
Reel/Frame 059363/0001 →
RELEASE OF SECURITY INTEREST Recorded Mar 10, 2022
From: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS NOTES COLLATERAL AGENT
To: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
Reel/Frame 059863/0400 →
SECURITY INTEREST Recorded Jun 4, 2021
From: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
To: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS NOTES COLLATERAL AGENT
Reel/Frame 057935/0474 →
SECURITY INTEREST Recorded Dec 24, 2020
From: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
To: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS COLLATERAL AGENT
Reel/Frame 055671/0612 →
SECURITY INTEREST Recorded Jun 5, 2020
From: MICROCHIP TECHNOLOGY INC.; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
To: WELLS FARGO BANK, NATIONAL ASSOCIATION
Reel/Frame 053468/0705 →
RELEASE OF SECURITY INTEREST Recorded May 30, 2020
From: JPMORGAN CHASE BANK, N.A, AS ADMINISTRATIVE AGENT
To: MICROCHIP TECHNOLOGY INC.; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
Reel/Frame 053466/0011 →
SECURITY INTEREST Recorded Apr 24, 2020
From: MICROCHIP TECHNOLOGY INC.; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
To: JPMORGAN CHASE BANK, N.A., AS ADMINISTRATIVE AGENT
Reel/Frame 053311/0305 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 5, 2006
From: VINN, CHARLES
To: MICREL, INC.
Reel/Frame 017594/0397 →