Method of manufacturing semiconductor device having gate electrodes of polymetal gate and dual-gate structure
View Patent ↗A silicon film is formed on a first region and a second region, respectively of a semiconductor substrate; P-type impurities are selectively ion-implanted into the silicon film in the first region; a first annealing is carried out, thereby the P-type impurities implanted in the silicon film are activated; N-type impurities are selectively ion-implanted into the silicon film in the second region, after the first annealing; a silicide film is formed on the silicon film according to a CVD method, after the ion-implantation of the N-type impurities; a second annealing is carried out, thereby gas contained in the silicide film is discharged and the N-type impurities are activated; a barrier metal film and a metal film are formed in this order on the silicide film; and the metal film, the barrier metal film, the silicide film and the silicon film are patterned, thereby a P-type polymetal gate electrode formed in the first region and an N-type polymetal gate electrode formed in the second region.
1. A method of manufacturing a semiconductor device comprising:
a first step for forming a silicon film on a first region and a second region, respectively of a semiconductor substrate;
a second step for selectively ion-implanting P-type impurities into the silicon film in the first region;
a third step for carrying out a first annealing, thereby activating the P-type impurities implanted in the silicon film;
a fourth step for selectively ion-implanting N-type impurities into the silicon film in the second region, after the third step;
a fifth step for forming a silicide film on the silicon film according to a CVD method, after the fourth step;
a sixth step for carrying out a second annealing, thereby discharging gas contained in the silicide film and activating the N-type impurities, after the fifth step;
a seventh step for forming a barrier metal film and a metal film in this order on the silicide film; and
an eighth step for patterning the metal film, the barrier metal film, the silicide film and the silicon film, thereby forming a P-type polymetal gate electrode in the first region and an N-type polymetal gate electrode in the second region.
2. The method of manufacturing a semiconductor device as claimed in claim 1 , wherein the silicide film is a tungsten silicide (WSi) film.
3. The method of manufacturing a semiconductor device as claimed in claim 1 , wherein a film thickness of the silicide film is within a range of 2 to 10 nm.
4. The method of manufacturing a semiconductor device as claimed in claim 1 , wherein the barrier metal film is a tungsten nitride (WN) film, and the metal film is a tungsten (W) film.
5. The method of manufacturing a semiconductor device as claimed in claim 1 , wherein the second annealing is carried out at a temperature within a range of 780 to 850° C.
6. The method of manufacturing a semiconductor device as claimed in claim 2 , wherein the second annealing is carried out at a temperature within a range of 780 to 850° C.
7. The method of manufacturing a semiconductor device as claimed in claim 3 , wherein the second annealing is carried out at a temperature within a range of 780 to 850° C.
8. The method of manufacturing a semiconductor device as claimed in claim 4 , wherein the second annealing is carried out at a temperature within a range of 780 to 850° C.
9. The method of manufacturing a semiconductor device as claimed in claim 1 , wherein the first annealing is carried out at a higher temperature and for a shorter period of time than those of the second annealing.
10. The method of manufacturing a semiconductor device as claimed in claim 2 , wherein the first annealing is carried out at a higher temperature and for a shorter period of time than those of the second annealing.
11. The method of manufacturing a semiconductor device as claimed in claim 3 , wherein the first annealing is carried out at a higher temperature and for a shorter period of time than those of the second annealing.
12. The method of manufacturing a semiconductor device as claimed in claim 4 , wherein the first annealing is carried out at a higher temperature and for a shorter period of time than those of the second annealing.
13. The method of manufacturing a semiconductor device as claimed in claim 5 , wherein the first annealing is carried out at a higher temperature and for a shorter period of time than those of the second annealing.
14. The method of manufacturing a semiconductor device as claimed in claim 6 , wherein the first annealing is carried out at a higher temperature and for a shorter period of time than those of the second annealing.
15. The method of manufacturing a semiconductor device as claimed in claim 7 , wherein the first annealing is carried out at a higher temperature and for a shorter period of time than those of the second annealing.
16. The method of manufacturing a semiconductor device as claimed in claim 8 , wherein the first annealing is carried out at a higher temperature and for a shorter period of time than those of the second annealing.
17. The method of manufacturing a semiconductor device as claimed in claim 1 , wherein at the first step, the silicon film is an amorphous silicon film, and the silicon film becomes polycrystalline silicon in the first annealing.
18. A method of manufacturing a semiconductor device, comprising:
a step of forming a silicon film on a first and second region of a semiconductor substrate;
a step of ion-implanting P-type impurities in the first region and N-type impurities in the second region in this order into the silicon film; and
a step of forming at least a silicide film and a metal film in this order on the silicon film, wherein
after ion-implanting the P-type impurities, a first annealing is carried out before ion-implanting the N-type impurities, and a second annealing is carried out after the N-type impurities are ion-implanted.
19. The method of manufacturing a semiconductor device as claimed in claim 18 , wherein the second annealing is carried out after the silicide film is formed and before the metal film is formed.