IP Library Granted Patent US 7,763,538
Granted Patent B2
US 7,763,538 · App. 11/328,693 · Granted Jul 27, 2010

Dual plasma treatment barrier film to reduce low-k damage

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Quick Facts
Patent No.
US 7,763,538
App. No.
11/328,693
Granted
Jul 27, 2010
Kind
B2
Abstract

A method is provided for creating a barrier layer ( 217 ) on a substrate comprising a dielectric layer ( 203 ) and a metal interconnect ( 211 ). In accordance with the method, the substrate is treated with a first plasma comprising helium, thereby forming a treated substrate. The treated substrate is then exposed to a second plasma selected from the group consisting of oxidizing plasmas and reducing plasmas. Next, a barrier layer is created on the treated substrate.

Claims (41)

1. A method for creating a barrier layer on a substrate comprising a first dielectric layer and a metal interconnect, comprising:

treating the substrate with a first plasma comprising helium, thereby forming a first treated substrate;

exposing the first treated substrate to a second plasma comprising NH 3 , thereby forming a second treated substrate;

creating a barrier layer on the second treated substrate;

depositing a second dielectric layer on the second treated substrate and barrier layer; and

forming a level of interconnect over the second dielectric layer;

wherein, prior to treatment of the substrate with the first plasma, the metal interconnect is formed by (a) creating a trench in the substrate, and (b) filling the trench with the metal.

2. Then method of claim 1 , wherein treatment of the substrate with the first plasma treatment substantially reduces the permeability of the substrate to the second plasma.

3. The method of claim 1 , wherein the dielectric layer is an inter-level dielectric (ILD) having a dielectric constant of less than 2.7.

4. The method of claim 1 , wherein the first treated substrate is treated with the second plasma immediately following treatment of the substrate with the first plasma.

5. The method of claim 4 , wherein the barrier layer is created in the same tool used to treat the substrate and the first treated substrate with the first and second plasmas, respectively, and wherein the substrate is maintained in a partial vacuum from the time when the substrate is treated with the first plasma to the time when the barrier layer is created.

6. The method of claim 1 , wherein the barrier layer comprises a material selected from the group consisting of SiCN, SiC and SiN.

7. The method of claim 1 , wherein the substrate is subjected to chemical mechanical polishing after the trench is filled with the metal, but before the substrate is treated with the first plasma, wherein a portion of the substrate adjacent to the trench has a cap layer disposed thereon, wherein the step of filling the trench with metal results in the formation of a layer of metal which extends over the cap layer, and wherein the layer of metal extending over the cap layer is removed through chemical mechanical polishing.

8. The method of claim 7 , wherein the cap layer is used as a polish hard mask during the chemical mechanical polishing.

9. The method of claim 7 , wherein the cap layer is removed by CMP or etching prior to treatment of the substrate with the first plasma.

10. The method of claim 1 , wherein the metal comprises copper, and wherein the barrier layer prevents copper diffusion in to the dielectric substrate.

11. The method of claim 1 , wherein the barrier layer comprises a material selected from the group consisting of TiW, Ti, TiN, Ta, and TaN.

12. The method of claim 1 , wherein the second plasma is a reducing plasma that reduces the metal interconnect.

13. The method of claim 1 , wherein the barrier layer extends over the dielectric layer.

14. A method for preparing a substrate comprising a dielectric layer and a cap layer for the application of a barrier layer thereto, comprising:

creating a trench which extends through the cap layer and into the dielectric layer;

depositing a layer of metal over the substrate such that the metal fills the trench and a portion of the metal extends over the cap layer;

subjecting the substrate to chemical mechanical polishing so that the portion of the layer of metal which extends over the cap layer is removed, thereby exposing a portion of the dielectric layer;

treating the exposed portion of the dielectric layer with a first plasma comprising helium, thereby forming a treated surface;

treating the metal with a second plasma comprising NH 3 , thereby forming a second treated surface

creating a barrier layer on the second treated surface and on the metal;

depositing a second dielectric layer on the second treated substrate and barrier layer; and

forming a level of interconnect over the second dielectric layer.

15. The method of claim 14 , wherein the metal comprises copper.

16. The method of claim 14 wherein, prior to depositing the layer of metal, a layer of a barrier metal is deposited over the surfaces of the trench.

17. A method for preparing a substrate comprising a first dielectric layer and a cap layer for the application of subsequent metal level dielectric layer thereto, comprising:

creating a trench which extends through the cap layer and into the dielectric layer;

depositing a layer of metal over the substrate such that the metal fills the trench and a portion of the metal extends over the cap layer;

subjecting the substrate to chemical mechanical polishing so that the portion of the layer of metal which extends over the cap layer is removed, thereby exposing a portion of the dielectric layer;

plating a selective metal barrier on top of the metal in the trench;

treating the exposed portion of the dielectric layer with a first plasma treatment comprising helium, thereby forming a first treated surface;

treating the first treated surface with a second plasma treatment comprising NH 3 , thereby forming a second treated surface;

depositing a second dielectric layer on the second treated surface and metal barrier; and

forming a level of interconnect over the second dielectric layer.

18. The method of claim 17 , wherein the metal barrier is deposited by electroless process.

19. The method of claim 17 , wherein the metal barrier comprises a material selected from the group consisting of Co, W, B, P, Ni, and Ru.

Assignments (26)
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 11759915 AND REPLACE IT WITH APPLICATION 11759935 PREVIOUSLY RECORDED ON REEL 040925 FRAME 0001. ASSIGNOR(S) HEREBY CONFIRMS THE RELEASE OF SECURITY INTEREST. Recorded Feb 17, 2020
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP, B.V. F/K/A FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 052917/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 11759915 AND REPLACE IT WITH APPLICATION 11759935 PREVIOUSLY RECORDED ON REEL 040928 FRAME 0001. ASSIGNOR(S) HEREBY CONFIRMS THE RELEASE OF SECURITY INTEREST. Recorded Jan 17, 2020
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP B.V.
Reel/Frame 052915/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 11759915 AND REPLACE IT WITH APPLICATION 11759935 PREVIOUSLY RECORDED ON REEL 037486 FRAME 0517. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS. Recorded Dec 10, 2019
From: CITIBANK, N.A.
To: MORGAN STANLEY SENIOR FUNDING, INC.
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From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
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CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 12298143 PREVIOUSLY RECORDED ON REEL 042985 FRAME 0001. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY AGREEMENT SUPPLEMENT. Recorded Oct 22, 2019
From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 051029/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 12298143 PREVIOUSLY RECORDED ON REEL 038017 FRAME 0058. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY AGREEMENT SUPPLEMENT. Recorded Oct 22, 2019
From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 051030/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 12298143 PREVIOUSLY RECORDED ON REEL 042762 FRAME 0145. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY AGREEMENT SUPPLEMENT. Recorded Oct 22, 2019
From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 051145/0184 →
RELEASE OF SECURITY INTEREST Recorded Sep 10, 2019
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP B.V.
Reel/Frame 050745/0001 →
RELEASE OF SECURITY INTEREST Recorded Sep 10, 2019
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP B.V.
Reel/Frame 050744/0097 →
CORRECTIVE ASSIGNMENT TO CORRECT THE TO CORRECT THE APPLICATION NO. FROM 13,883,290 TO 13,833,290 PREVIOUSLY RECORDED ON REEL 041703 FRAME 0536. ASSIGNOR(S) HEREBY CONFIRMS THE THE ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS.. Recorded Feb 20, 2019
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To: SHENZHEN XINGUODU TECHNOLOGY CO., LTD.
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CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 12681366 PREVIOUSLY RECORDED ON REEL 039361 FRAME 0212. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY AGREEMENT SUPPLEMENT. Recorded May 9, 2017
From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 042762/0145 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 12681366 PREVIOUSLY RECORDED ON REEL 038017 FRAME 0058. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY AGREEMENT SUPPLEMENT. Recorded May 9, 2017
From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 042985/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE PATENTS 8108266 AND 8062324 AND REPLACE THEM WITH 6108266 AND 8060324 PREVIOUSLY RECORDED ON REEL 037518 FRAME 0292. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS. Recorded Feb 1, 2017
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From: FREESCALE SEMICONDUCTOR INC.
To: NXP USA, INC.
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CHANGE OF NAME Recorded Nov 8, 2016
From: FREESCALE SEMICONDUCTOR INC.
To: NXP USA, INC.
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RELEASE OF SECURITY INTEREST Recorded Nov 7, 2016
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP B.V.
Reel/Frame 040928/0001 →
RELEASE OF SECURITY INTEREST Recorded Sep 21, 2016
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP, B.V., F/K/A FREESCALE SEMICONDUCTOR, INC.
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CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 12092129 PREVIOUSLY RECORDED ON REEL 038017 FRAME 0058. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY AGREEMENT SUPPLEMENT. Recorded Jul 14, 2016
From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
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SUPPLEMENT TO THE SECURITY AGREEMENT Recorded Jun 16, 2016
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To: MORGAN STANLEY SENIOR FUNDING, INC.
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ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS Recorded Jan 12, 2016
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PATENT RELEASE Recorded Dec 21, 2015
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To: FREESCALE SEMICONDUCTOR, INC.
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PATENT RELEASE Recorded Dec 21, 2015
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PATENT RELEASE Recorded Dec 21, 2015
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To: FREESCALE SEMICONDUCTOR, INC.
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SECURITY AGREEMENT Recorded Nov 6, 2013
From: FREESCALE SEMICONDUCTOR, INC.
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