Pb-free solder-connected structure and electronic device
View Patent ↗Provided are a bonded structure by a lead-free solder and an electronic article comprising the bonded structure. The bonded structure has a stable bonding interface with respect to a change in process of time, an enough strength and resistance to occurrence of whiskers while keeping good wettability of the solder. In the bonded structure, a lead-free Sn—Ag—Bi alloy solder is applied to an electrode through an Sn—Bi alloy layer. The Sn—Bi alloy, preferably, comprises 1 to 20 wt % Bi in order to obtain good wettability of the solder. In order to obtain desirable bonding characteristics having higher reliability in the invention, a copper layer is provided under the Sn—Bi alloy layer thereby obtaining an enough bonding strength.
1. An electronic device comprising:
a substrate; and
a semiconductor device having a lead on which a single Sn—Bi alloy layer comprising 1 to 5 wt % Bi is provided,
wherein the substrate and the semiconductor device are connected with each other by utilization of a Pb-free solder, the Pb-free solder being applied to the lead through the single Sn—Bi layer.
2. The electronic device according to claim 1 , wherein the Pb-free solder contains Bi.
3. The electronic device according to claim 1 , wherein the Pb-free solder is of a Sn—Ag—Bi alloy.
4. The electronic device according to claim 1 , wherein the Pb-free solder contains Sn and Ag.
5. The electronic device according to claim 1 , wherein the Pb-free solder contains Sn, Ag and Cu.
6. The electronic device according to claim 1 , wherein the Pb-free solder contains 5 to 25 wt % Bi, 1.5 to 3 wt % Ag and not less than 1 wt % Cu.
7. The electronic device according to claim 1 , wherein material of the lead is an Fe-Ni alloy.
8. The electronic device according to claim 1 , wherein material of the lead is a Cu alloy.
9. The electronic device according to claim 1 , wherein the semiconductor device is a Thin Small Outline Package (TSOP).
10. The electronic device according to claim 1 , wherein the semiconductor device is a Quad Flat Package (QFP).
11. An electronic device comprising:
a substrate; and
a semiconductor device having a lead on which a single Sn—Bi alloy layer comprising 1 to 20 wt % Bi, except for 4 to 15 wt % Bi, is provided,
wherein the substrate and the semiconductor device are connected with each other by utilization of a Pb-free solder, the Pb-free solder being applied to the lead through the single Sn—Bi alloy layer.
12. An electronic device comprising:
a substrate; and
a semiconductor device having a lead on which a single layer is provided, said single layer being a Sn—Bi alloy layer comprising 1 to 20 wt % Bi,
wherein the substrate and the semiconductor device are connected with each other by utilization of a Pb-free solder, the Pb-free solder being applied to the lead through the single Sn—Bi alloy layer.
13. The electronic device according to claim 12 , wherein said Sn—Bi alloy layer comprises 1 to 5 wt % Bi.