Granted Patent B2

US 7,373,278 · App. 11/336,230 · Granted May 13, 2008

Abstract

Claims (53)

1. A method of latent fault checking a cooling module of an embedded computer chassis, comprising:

prior to detection of an active fault in the cooling module, performing a fan controller latent fault checking algorithm and a full-speed latent fault checking algorithm, the fan controller latent fault checking algorithm comprising:

communicating a signal to modify a fan speed in the cooling module via a fan controller module in the cooling module;

determining if a change in the fan speed is detected;

the full-speed latent fault checking algorithm comprising:

communicating a signal to modify the fan speed via a full speed fan control circuit, bypassing the fan controller module;

determining if the change in the fan speed is detected; and

if the change in the fan speed is not detected in at least one of the fan controller latent fault checking algorithm and the full-speed latent fault checking algorithm, indicating a latent fault in the cooling module of the embedded computer chassis.

2. The method of claim 1 , the fan controller latent fault checking algorithm further comprising:

communicating an increase fan speed signal;

determining if an increase in the fan speed is detected;

communicating a decrease fan speed signal;

determining if a decrease in the fan speed is detected; and

if at least one of the increase in the fan speed and the decrease in the fan speed are not detected, indicating the latent fault in the cooling module of the embedded computer chassis.

3. The method of claim 2 , wherein a bus master module commanding the fan controller module to modify the fan speed.

4. The method of claim 3 , wherein the bus master module commanding the fan controller module via an Intelligent Platform Management Bus (IPMB).

5. The method of claim 1 , the full-speed latent fault checking algorithm further comprising:

communicating a full-speed signal, bypassing the fan controller module;

determining if an increase in the fan speed is detected;

removing the full-speed signal, bypassing the fan controller module;

determining if a decrease in the fan speed is detected; and

if at least one of the increase in the fan speed and the decrease in the fan speed are not detected, indicating the latent fault in the cooling module of the embedded computer chassis.

6. The method of claim 5 , wherein a bus master module applying a full-speed signal to increase the fan speed to full-speed, bypassing the fan controller module.

7. The method of claim 5 , wherein a bus master module removing a full-speed signal to decrease the fan speed, bypassing the fan controller module.

8. The method of claim 1 , wherein detecting the change in fan speed comprises a fan tachometer detecting the fan speed.

9. The method of claim 1 , wherein indicating a latent fault comprises communicating an alarm signal.

10. An embedded computer chassis, comprising:

a cooling module operable to cool the embedded computer chassis;

a bus master module coupled to the cooling module, wherein prior to detection of an active fault in the cooling module, the bus master module performing a fan controller latent fault checking algorithm and a full-speed latent fault checking algorithm, the fan controller latent fault checking algorithm comprising:

communicating a signal to modify a fan speed in the cooling module via a fan controller module in the cooling module;

determining if a change in the fan speed is detected;

the full-speed latent fault checking algorithm comprising:

communicating a signal to modify the fan speed via a full speed fan control circuit, bypassing the fan controller module;

determining if the change in the fan speed is detected; and

if the change in the fan speed is not detected in at least one of the fan controller latent fault checking algorithm and the full-speed latent fault checking algorithm, a latent fault in the cooling module of the embedded computer chassis is indicated.

11. The embedded computer chassis of claim 10 , the fan controller latent fault checking algorithm further comprising:

communicating an increase fan speed signal;

determining if an increase in the fan speed is detected;

communicating a decrease fan speed signal;

determining if a decrease in the fan speed is detected; and

if at least one of the increase in the fan speed and the decrease in the fan speed are not detected, the latent fault in the cooling module of the embedded computer chassis is indicated.

12. The embedded computer chassis of claim 11 , wherein the bus master module commands the fan controller module to modify the fan speed.

13. The embedded computer chassis of claim 12 , wherein the bus master module commands the fan controller module via an Intelligent Platform Management Bus (IPMB).

14. The embedded computer chassis of claim 10 , the full-speed latent fault checking algorithm further comprising:

communicating a full-speed signal, bypassing the fan controller module;

determining if an increase in the fan speed is detected;

removing the full-speed signal, bypassing the fan controller module;

determining if a decrease in the fan speed is detected; and

if at least one of the increase in the fan speed and the decrease in the fan speed are not detected, the latent fault in the cooling module of the embedded computer chassis is indicated.

15. The embedded computer chassis of claim 14 , wherein the bus master module applies a full-speed signal to increase the fan speed to full-speed, bypassing the fan controller module.

16. The embedded computer chassis of claim 14 , wherein the bus master module removes a full-speed signal to decrease the fan speed, bypassing the fan controller module.

17. The embedded computer chassis of claim 10 , wherein the change in fan speed is detected by a fan tachometer.

18. The embedded computer chassis of claim 10 , wherein when a latent fault is detected an alarm signal is communicated.

Assignments (11)