IP Library Granted Patent US 7,510,956
Granted Patent B2
US 7,510,956 · App. 11/343,623 · Granted Mar 31, 2009

MOS device with multi-layer gate stack

Assignee: Fressscale Semiconductor, Inc.
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Quick Facts
Patent No.
US 7,510,956
App. No.
11/343,623
Granted
Mar 31, 2009
Kind
B2
Abstract

Methods and apparatus are provided for semiconductor devices. The apparatus comprises a substrate having therein a source region and a drain region separated by a channel region extending to a first surface of the substrate, and a multilayered gate structure located above the channel region. The gate structure comprises, a gate dielectric, preferably of an oxide of Hf, Zr or HfZr substantially in contact with the channel region, a first conductor layer of, for example an oxide of MoSi overlying the gate dielectric, a second conductor layer of, e.g., poly-Si, overlying the first conductor layer and adapted to apply an electrical field to the channel region, and an impurity migration inhibiting layer (e.g., MoSi) located above or below the first conductor layer and adapted to inhibit migration of a mobile impurity, such as oxygen for example, toward the substrate.

Claims (46)

1. A method for forming a semiconductor device with a multilayered gate structure resistant to migration of a mobile species and overlying a channel region of the device, comprising:

providing a semiconductor substrate having an upper surface;

forming on the upper surface a stack of overlying layers in various orders, comprising:

a gate oxide layer having an interface in contact with the upper surface;

a first conductor layer comprising a metal oxide;

a first absorption layer of a conductive absorption material having a higher affinity for oxygen than the first conductor layer for reducing migration of the mobile species toward the interface;

a second conductor layer comprising the metal oxide;

a second absorption layer comprising the conductive absorption material that is formed on an opposing side of the second conductor layer from the first absorption layer; and

a third conductor layer; and

removing portions of the stack of layers lying laterally outside a region desired to be the channel region of the device, thereby forming the multi-layered gate structure having multiple alternating layers of the metal oxide and the conductive absorption material between the gate oxide layer and the third conductor layer overlying the channel region of the device.

2. The method of claim 1 , wherein the first and second conductor layers comprise molybdenum-silicon-oxide, the third conductor layer comprises a polycrystalline semiconductor and the first and second absorption layers comprise molybdenum-silicide.

3. The method of claim 1 wherein the conductive absorption material is a metal silicide.

4. The method of claim 1 wherein the conductive absorption material is molybdenum silicide.

5. A method for forming a semiconductor device on a semiconductor substrate having an upper surface, wherein the semiconductor device comprises a multilayered gate structure resistant to migration of a mobile species and overlying a channel region of the device, the method comprising:

forming on the upper surface of the semiconductor substrate a stack of overlying layers in various orders, comprising:

a gate oxide layer having an interface in contact with the upper surface;

a first conductor layer comprising a metal oxide;

a second conductor layer; and

an absorption layer of a conductive absorption material different from the metal oxide of the first conductor layer and having a higher affinity for oxygen than the first conductor layer for reducing migration of the mobile species toward the interface, wherein the absorption layer is formed after the first conductor layer and before the second conductor layer and lies therebetween; and then

repeating multiple times the step of first forming the first conductor and then forming the absorption layer so as to provide pairs of alternating layers of the metal oxide and the conductive absorption material overlying the gate oxide and underlying the second conductor; and

removing portions of the stack of layers lying laterally outside a region desired to be the channel region of the device, thereby forming the multi-layered gate structure overlying the channel region of the device.

6. The method of claim 5 , wherein the first conductor layer comprises molybdenum-silicon-oxide, the second conductor layer comprises a polycrystalline semiconductor and the absorption layer comprises molybdenum-silicide.

7. The method of claim 5 , wherein the gate oxide layer comprises oxides of Hf, Zr or HfZr.

8. The method of claim 5 , wherein the first conductor layer comprises one or more silicates of Mo, Nb, V, Re, Ru, Os, Rh, Ir, Pd, or nitrides of such silicates.

9. The method of claim 5 wherein the absorption layer comprises at least one metallic element in common with the first conductor layer.

10. The method of claim 5 , wherein the semiconductor device is a PMOS device and the first conductor layer comprises an oxide of MoSi and the absorption layer comprises MoSi.

11. The method of claim 5 , wherein the second conductor layer comprises a polycrystalline semiconductor, the absorption layer comprises molybdenum-silicide, the gate oxide layer comprises oxides of Hf, Zr or HfZr, and the first conductor layer comprises one or more silicates of Mo, Nb, V, Re, Ru, Os, Rh, Ir, Pd, or nitrides of such silicates.

12. The method of claim 5 wherein the conductive absorption material is a metal silicide.

13. The method of claim 5 wherein the conductive absorption material is molybdenum silicide.

14. A method for forming a semiconductor device with a multilayered gate structure resistant to migration of a mobile species and overlying a channel region of the device, comprising:

providing a semiconductor substrate having an upper surface;

forming on the upper surface a stack of overlying layers in various orders, comprising:

a gate oxide layer having an interface in contact with the upper surface;

a first conductor layer comprising a metal oxide;

a second conductor layer; and

an absorption layer of a conductive absorption material different from the metal oxide of the first conductor layer and having a higher affinity for oxygen than the first conductor layer for reducing migration of the mobile species toward the interface, wherein the absorption layer is formed after the gate oxide and before the first conductor layer and lies therebetween; and then

repeating multiple times the steps of first forming the absorption layer and then forming the first conductor so as to provide pairs of alternating layers of the metal oxide and the conductive absorption material overlying the gate oxide and underlying the second conductor; and

removing portions of the stack of layers lying laterally outside a region desired to be the channel region of the device, thereby forming the multi-layered gate structure overlying the channel region of the device.

15. The method of claim 14 , wherein the first conductor layer comprises molybdenum-silicon-oxide, the second conductor layer comprises a polycrystalline semiconductor and the absorption layer comprises molybdenum-silicide.

16. The method of claim 14 , wherein the gate oxide layer comprises oxides of Hf, Zr or HfZr.

17. The method of claim 14 , wherein the first conductor comprises one or more silicates of Mo, Nb, V, Re, Ru, Os, Rh, Ir, Pd, or nitrides of such silicates.

18. The method of claim 14 wherein the absorption layer comprises at least one metallic element in common with the first conductor layer.

19. The method of claim 14 , wherein the semiconductor device is a PMOS device and the first conductor layer comprises an oxide of MoSi and the absorption layer comprises MoSi.

20. The method of claim 14 , wherein the second conductor layer comprises a polycrystalline semiconductor, the absorption layer comprises molybdenum-silicide, the gate oxide layer comprises oxides of Hf, Zr or HfZr, and the first conductor layer comprises one or more silicates of Mo, Nb, V, Re, Ru, Os, Rh, Ir, Pd, or nitrides of such silicates.

21. The method of claim 14 wherein the conductive absorption material is a metal silicide.

22. The method of claim 14 wherein the conductive absorption material is molybdenum silicide.

Assignments (21)
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 11759915 AND REPLACE IT WITH APPLICATION 11759935 PREVIOUSLY RECORDED ON REEL 040925 FRAME 0001. ASSIGNOR(S) HEREBY CONFIRMS THE RELEASE OF SECURITY INTEREST. Recorded Feb 17, 2020
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP, B.V. F/K/A FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 052917/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 11759915 AND REPLACE IT WITH APPLICATION 11759935 PREVIOUSLY RECORDED ON REEL 040928 FRAME 0001. ASSIGNOR(S) HEREBY CONFIRMS THE RELEASE OF SECURITY INTEREST. Recorded Jan 17, 2020
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP B.V.
Reel/Frame 052915/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 11759915 AND REPLACE IT WITH APPLICATION 11759935 PREVIOUSLY RECORDED ON REEL 037486 FRAME 0517. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS. Recorded Dec 10, 2019
From: CITIBANK, N.A.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 053547/0421 →
RELEASE OF SECURITY INTEREST Recorded Sep 10, 2019
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP B.V.
Reel/Frame 050744/0097 →
CORRECTIVE ASSIGNMENT TO CORRECT THE TO CORRECT THE APPLICATION NO. FROM 13,883,290 TO 13,833,290 PREVIOUSLY RECORDED ON REEL 041703 FRAME 0536. ASSIGNOR(S) HEREBY CONFIRMS THE THE ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS.. Recorded Feb 20, 2019
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: SHENZHEN XINGUODU TECHNOLOGY CO., LTD.
Reel/Frame 048734/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE PATENTS 8108266 AND 8062324 AND REPLACE THEM WITH 6108266 AND 8060324 PREVIOUSLY RECORDED ON REEL 037518 FRAME 0292. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS. Recorded Feb 1, 2017
From: CITIBANK, N.A.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 041703/0536 →
CORRECTIVE ASSIGNMENT TO CORRECT THE NATURE OF CONVEYANCE LISTED CHANGE OF NAME SHOULD BE MERGER AND CHANGE PREVIOUSLY RECORDED AT REEL: 040652 FRAME: 0180. ASSIGNOR(S) HEREBY CONFIRMS THE MERGER AND CHANGE OF NAME. Recorded Jan 12, 2017
From: FREESCALE SEMICONDUCTOR INC.
To: NXP USA, INC.
Reel/Frame 041354/0148 →
CHANGE OF NAME Recorded Nov 8, 2016
From: FREESCALE SEMICONDUCTOR INC.
To: NXP USA, INC.
Reel/Frame 040652/0180 →
RELEASE OF SECURITY INTEREST Recorded Nov 7, 2016
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP B.V.
Reel/Frame 040928/0001 →
RELEASE OF SECURITY INTEREST Recorded Sep 21, 2016
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP, B.V., F/K/A FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 040925/0001 →
SUPPLEMENT TO THE SECURITY AGREEMENT Recorded Jun 16, 2016
From: FREESCALE SEMICONDUCTOR, INC.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 039138/0001 →
ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS Recorded Jan 13, 2016
From: CITIBANK, N.A.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 037518/0292 →
ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS Recorded Jan 12, 2016
From: CITIBANK, N.A.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 037486/0517 →
PATENT RELEASE Recorded Dec 21, 2015
From: CITIBANK, N.A., AS COLLATERAL AGENT
To: FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 037356/0143 →
PATENT RELEASE Recorded Dec 21, 2015
From: CITIBANK, N.A., AS COLLATERAL AGENT
To: FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 037354/0225 →
PATENT RELEASE Recorded Dec 21, 2015
From: CITIBANK, N.A., AS COLLATERAL AGENT
To: FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 037356/0553 →
SECURITY AGREEMENT Recorded Nov 6, 2013
From: FREESCALE SEMICONDUCTOR, INC.
To: CITIBANK, N.A., AS NOTES COLLATERAL AGENT
Reel/Frame 031591/0266 →
SECURITY AGREEMENT Recorded Jun 18, 2013
From: FREESCALE SEMICONDUCTOR, INC.
To: CITIBANK, N.A., AS NOTES COLLATERAL AGENT
Reel/Frame 030633/0424 →
SECURITY AGREEMENT Recorded May 13, 2010
From: FREESCALE SEMICONDUCTOR, INC.
To: CITIBANK, N.A., AS COLLATERAL AGENT
Reel/Frame 024397/0001 →
SECURITY AGREEMENT Recorded Feb 2, 2007
From: FREESCALE SEMICONDUCTOR, INC.; FREESCALE ACQUISITION CORPORATION; FREESCALE ACQUISITION HOLDINGS CORP.; FREESCALE HOLDINGS (BERMUDA) III, LTD.
To: CITIBANK, N.A. AS COLLATERAL AGENT
Reel/Frame 018855/0129 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 30, 2006
From: LIU, CHUN-LI; ORLOWSKI, MARIUS K.; STOKER, MATTHEW W.
To: FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 017532/0750 →
Continuity (1)
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