IP Library Granted Patent US 7,439,791
Granted Patent B2
US 7,439,791 · App. 11/344,511 · Granted Oct 21, 2008

Temperature compensation device and method thereof

Assignee: Freescale Semiconductor, Inc.
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Quick Facts
Patent No.
US 7,439,791
App. No.
11/344,511
Granted
Oct 21, 2008
Kind
B2
Abstract

A device and method for temperature compensation of an electronic device are disclosed. The device includes a temperature bias controller with a temperature sensor. A bias signal based upon a signal from the temperature sensor is provided to a first gate of a multiple fin gate field effect transistor (multigate FinFET) transistor of a functional block. A second gate of the multigate FinFET transistor receives a control signal to control its operation within the functional block. In this configuration the first gate of the multigate FinFET transistor can be used for temperature compensation while the second gate is used for functional operation of the transistor. Specific embodiments of the present disclosure will be better understood with respect to the figures.

Claims (28)

1. An electronic device, comprising:

a temperature bias controller comprising a first temperature sensor coupled to a first bias output of the temperature bias controller, and a second temperature sensor coupled to a second bias output of the temperature bias controller;

a first multigate FinFET transistor comprising a first gate and a second gate, the second gate coupled to the first bias output of the temperature bias controller; and

a second multigate FinFET transistor including a first gate and a second gate, the second gate coupled to the second bias output of the temperature bias controller.

2. The electronic device of claim 1 , wherein the first gate of the first multigate FinFET transistor is coupled to a first functional control module.

3. The electronic device of claim 1 , wherein the temperature bias controller further comprises a first bias controller comprising an input coupled to the first temperature sensor and the first bias output of the temperature bias controller.

4. The electronic device of claim 1 , wherein the first temperature sensor is an active temperature sensor.

5. The electronic device of claim 1 , wherein the first temperature sensor is located closer to the first multigate FinFET transistor than to the second multigate FinFET transistor.

6. The electronic device of claim 1 , wherein the first temperature sensor is an active temperature sensor and the second temperature sensor is a passive temperature sensor.

7. The electronic device of claim 1 wherein the temperature bias controller further comprises a third bias output coupled to the second temperature sensor; and the device further comprising:

third multigate FinFET transistor including a first gate and a second gate, the second gate coupled to the second bias output of the temperature bias controller.

8. An electronic device, comprising:

a temperature bias controller comprising a first temperature sensor coupled to a first bias output of the temperature bias controller, a second temperature sensor coupled to the first bias output of the temperature bias controller, and a signal switching module to selectively electronically couple one of the first temperature sensor and the second temperature sensor to the first bias output; and

first multigate FinFET transistor comprising a first gate and a second gate, the second gate coupled to the first bias output of the temperature bias controller.

9. An electronic device, comprising:

temperature bias controller comprising a first temperature sensor, a first bias controller comprising an input coupled to the first temperature sensor, a second bias controller comprising an input coupled to the first temperature sensor, a signal switching module to selectively electronically couple one of the first bias controller and the second bias controller to a first bias output of the temperature bias controller; and

a first multigate FinFET transistor comprising a first gate and a second gate, the second gate coupled to the first bias output of the temperature bias controller.

10. The electronic device of claim 9 , wherein the temperature bias controller further comprises:

second temperature sensor.

11. A method, comprising:

receiving at a first gate of a first multigate FinFET transistor a control signal from a functional module;

selecting one of a plurality of temperature sensors for generating the first bias signal; and

receiving at a first time at a second gate of the first multigate FinFET transistor a first bias signal from a temperature bias controller, wherein the presence of the control signal and the first bias signal at the first multigate FinFET transistor overlap in time and the first bias signal corresponds to a first detected temperature.

12. The method of claim 11 , further comprising:

receiving at a second time at the second gate of the first multigate FinFET transistor a second bias signal from the temperature bias controller, wherein the second bias signal corresponds to a second detected temperature different from the first detected temperature.

13. The method of claim 11 , further comprising receiving at the first time the first bias signal at a first gate of a second multigate FinFET transistor.

14. The method of claim 11 , further comprising:

receiving at the first time a second bias signal from the temperature bias controller at a first gate of a second multigate FinFET transistor, the second bias signal indicating a second detected temperature level.

Assignments (32)
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 11759915 AND REPLACE IT WITH APPLICATION 11759935 PREVIOUSLY RECORDED ON REEL 040925 FRAME 0001. ASSIGNOR(S) HEREBY CONFIRMS THE RELEASE OF SECURITY INTEREST. Recorded Feb 17, 2020
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP, B.V. F/K/A FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 052917/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 11759915 AND REPLACE IT WITH APPLICATION 11759935 PREVIOUSLY RECORDED ON REEL 040928 FRAME 0001. ASSIGNOR(S) HEREBY CONFIRMS THE RELEASE OF SECURITY INTEREST. Recorded Jan 17, 2020
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP B.V.
Reel/Frame 052915/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 11759915 AND REPLACE IT WITH APPLICATION 11759935 PREVIOUSLY RECORDED ON REEL 037486 FRAME 0517. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS. Recorded Dec 10, 2019
From: CITIBANK, N.A.
To: MORGAN STANLEY SENIOR FUNDING, INC.
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CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 12298143 PREVIOUSLY RECORDED ON REEL 042985 FRAME 0001. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY AGREEMENT SUPPLEMENT. Recorded Oct 22, 2019
From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 051029/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 12298143 PREVIOUSLY RECORDED ON REEL 042762 FRAME 0145. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY AGREEMENT SUPPLEMENT. Recorded Oct 22, 2019
From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 051145/0184 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 12298143 PREVIOUSLY RECORDED ON REEL 038017 FRAME 0058. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY AGREEMENT SUPPLEMENT. Recorded Oct 22, 2019
From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 051030/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 12298143 PREVIOUSLY RECORDED ON REEL 039361 FRAME 0212. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY AGREEMENT SUPPLEMENT. Recorded Oct 22, 2019
From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 051029/0387 →
RELEASE OF SECURITY INTEREST Recorded Sep 10, 2019
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP B.V.
Reel/Frame 050745/0001 →
RELEASE OF SECURITY INTEREST Recorded Sep 10, 2019
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP B.V.
Reel/Frame 050744/0097 →
CORRECTIVE ASSIGNMENT TO CORRECT THE TO CORRECT THE APPLICATION NO. FROM 13,883,290 TO 13,833,290 PREVIOUSLY RECORDED ON REEL 041703 FRAME 0536. ASSIGNOR(S) HEREBY CONFIRMS THE THE ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS.. Recorded Feb 20, 2019
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From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 042762/0145 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 12681366 PREVIOUSLY RECORDED ON REEL 038017 FRAME 0058. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY AGREEMENT SUPPLEMENT. Recorded May 9, 2017
From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
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CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE PATENTS 8108266 AND 8062324 AND REPLACE THEM WITH 6108266 AND 8060324 PREVIOUSLY RECORDED ON REEL 037518 FRAME 0292. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS. Recorded Feb 1, 2017
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From: FREESCALE SEMICONDUCTOR INC.
To: NXP USA, INC.
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CHANGE OF NAME Recorded Nov 8, 2016
From: FREESCALE SEMICONDUCTOR INC.
To: NXP USA, INC.
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RELEASE OF SECURITY INTEREST Recorded Nov 7, 2016
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP B.V.
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RELEASE OF SECURITY INTEREST Recorded Sep 21, 2016
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To: NXP, B.V., F/K/A FREESCALE SEMICONDUCTOR, INC.
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PATENT RELEASE Recorded Dec 21, 2015
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Continuity (1)
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