IP Library Granted Patent US 7,880,446
Granted Patent B2
US 7,880,446 · App. 11/352,031 · Granted Feb 1, 2011

Adaptive frequency compensation for DC-to-DC converter

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Quick Facts
Patent No.
US 7,880,446
App. No.
11/352,031
Granted
Feb 1, 2011
Kind
B2
Abstract

One embodiment of the invention is a compensation circuit that includes a comparator that is coupled to receive a reference voltage. The compensation circuit can also include a capacitance coupled to receive a feedback voltage associated with an output voltage of a converter. Furthermore, the compensation circuit can include an adjustable resistance that is coupled to the capacitance and to the comparator.

Claims (35)

1. A compensation circuit comprising:

a comparator coupled to receive a reference voltage;

a first capacitance coupled to receive a feedback voltage associated with an output voltage of a converter; and

an adjustable resistance coupled to said first capacitance and to said comparator.

2. The compensation circuit of claim 1 , wherein said first capacitance is coupled in parallel with said adjustable resistance.

3. The compensation circuit of claim 2 , further comprising:

a second capacitance coupled in series with said first capacitance; and

a resistance coupled in series with said second capacitance and coupled to an output of said comparator.

4. The compensation circuit of claim 1 , further comprising:

a control circuit coupled to change said adjustable resistance.

5. The compensation circuit of claim 1 wherein said compensation circuit is coupled to a duty cycle controller of said converter.

6. The compensation circuit of claim 5 , wherein said duty cycle controller is coupled to a power stage of said converter.

7. The compensation circuit of claim 1 , wherein said adjustable resistance comprises a plurality of resistors and a switch, said switch coupled to a resistor of said plurality of resistors.

8. A compensation circuit comprising:

a comparator coupled to receive a reference voltage;

a capacitance coupled to receive a feedback voltage associated with an output voltage of a converter; and

an adjustable capacitance coupled to said capacitance.

9. The compensation circuit of claim 8 , wherein said capacitance is coupled in parallel with a first resistance coupled to said comparator.

10. The compensation circuit of claim 9 , further comprising:

a second resistance coupled to said adjustable capacitance and an output of said comparator.

11. The compensation circuit of claim 8 , further comprising:

a control circuit coupled to change said adjustable capacitance.

12. The compensation circuit of claim 8 , wherein said compensation circuit is coupled to a duty cycle controller of said converter.

13. The compensation circuit of claim 12 , wherein said duty cycle controller is coupled to a power stage of said converter.

14. The compensation circuit of claim 8 , wherein said adjustable capacitance comprises a plurality of capacitors and a switch, said switch coupled to a capacitor of said plurality of capacitors.

15. A method comprising:

establishing an adjustable resistance of a compensation circuit at an upper value;

determining whether a transient feedback voltage exceeds a predefined range, said transient feedback voltage is associated with an output voltage of a converter circuit; and

establishing said adjustable resistance at a lower value, in response to said transient feedback voltage exceeding said predefined range.

16. The method of claim 15 , further comprising:

increasing said adjustable resistance to a higher value when said transient feedback voltage crosses a reference voltage value, after said transient feedback voltage exceeds said predefined range.

17. The method of claim 16 , wherein said increasing is performed at each odd numbered occurrence that said transient feedback voltage crosses said reference voltage value.

18. The method of claim 17 , wherein said increasing is performed until said upper value is reached.

19. The method of claim 15 , wherein said compensation circuit is part of a buck converter or a boost converter.

20. The method of claim 15 , wherein said predefined range is a delta percentage plus or minus said reference voltage.

Assignments (4)
RELEASE OF SECURITY INTEREST Recorded Jul 17, 2019
From: JPMORGAN CHASE BANK, N.A., AS ADMINISTRATIVE AGENT
To: VISHAY DALE ELECTRONICS, INC.; DALE ELECTRONICS, INC.; VISHAY INTERTECHNOLOGY, INC.; SILICONIX INCORPORATED; VISHAY SPRAGUE, INC.; VISHAY TECHNO COMPONENTS, LLC; VISHAY EFI, INC.; VISHAY VITRAMON, INC.; SPRAGUE ELECTRIC COMPANY
Reel/Frame 049826/0312 →
SECURITY INTEREST Recorded Jun 12, 2019
From: VISHAY DALE ELECTRONICS, INC.; DALE ELECTRONICS, INC.; VISHAY DALE ELECTRONICS, LLC; VISHAY-DALE, INC.; VISHAY INTERTECHNOLOGY, INC.; SILICONIX INCORPORATED; VISHAY-SILICONIX, INC.; VISHAY-SILICONIX; VISHAY SPRAGUE, INC.; VISHAY EFI, INC.; SPRAGUE ELECTRIC COMPANY; VISHAY GENERAL SEMICONDUCTOR, INC.
To: JPMORGAN CHASE BANK, N.A., AS ADMINISTRATIVE AGENT
Reel/Frame 049440/0876 →
SECURITY AGREEMENT Recorded Jan 21, 2011
From: VISHAY INTERTECHNOLOGY, INC.; VISHAY DALE ELECTRONICS, INC.; SILICONIX INCORPORATED; VISHAY SPRAGUE, INC.
To: JPMORGAN CHASE BANK, N.A., AS ADMINISTRATIVE AGENT
Reel/Frame 025675/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 21, 2006
From: CHEN, LU; FERRARIO, BRUNO
To: VISHAY-SILICONIX
Reel/Frame 018129/0033 →