IP Library Patent Application 11363792
Patent Application
App. No. 11/363,792

Semiconductor device and fabrication method therefor

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Quick Facts
Patent No.
US None
App. No.
11/363,792
Abstract

A semiconductor device of the present invention includes a semiconductor substrate ( 10 ) having a bit line ( 14 ), an ONO film ( 16 ) that is provided on the semiconductor substrate ( 10 ) and has an opening ( 46 ), an interlayer insulating film ( 30 ) that is provided on the ONO film ( 16 ) and has a contact hole ( 40 ) connected to the bit line ( 14 ) and provided in the opening ( 46 ), and an insulation layer ( 44 ) provided between and separating the ONO film ( 16 ) and the contact hole ( 40 ). In forming the contact hole ( 40 ) in the interlayer insulating film ( 30 ), the ONO film ( 16 ) being provided separately from the contact hole ( 40 ) prevents the damage region from being created in the ONO film ( 16 ). This makes it possible to suppress charge loss from the trapping layer due to the damage region and provide a highly reliable semiconductor device.

Claims (25)

1 . A semiconductor device comprising:

a semiconductor substrate having a bit line;

an ONO film that is provided on the semiconductor substrate and has an opening;

an interlayer insulating film that is provided on the ONO film and has a contact hole connected to the bit line and provided in the opening; and

an insulation layer provided between and separating the ONO film and the contact hole.

2 . The semiconductor device as claimed in claim 1 , wherein the insulation layer is a portion of the interlayer insulating film.

3 . The semiconductor device as claimed in claim 1 , wherein the opening formed in the ONO film is provided common to multiple bit lines.

4 . The semiconductor device as claimed in claim 1 , wherein the opening formed in the ONO film is provided for each bit line.

5 . The semiconductor device as claimed in claim 1 , further comprising a first sidewall layer that is provided on the ONO film and contacts a side of a word line provided on the ONO film, wherein the opening in the ONO film is formed with a mask composed of the word line and the first sidewall layer.

6 . The semiconductor device as claimed in claim 5 , wherein the first sidewall layer comprises a silicon oxide film contacting the word line and the ONO film, and a silicon nitride film contacting the silicon oxide film.

7 . The semiconductor device as claimed in claim 1 , further comprising a second sidewall layer provided on a side of the opening.

8 . The semiconductor device as claimed in claim 7 , wherein the second sidewall layer includes a silicon nitride layer.

9 . The semiconductor device as claimed in claim 7 , wherein the insulation layer includes the interlayer insulating layer and the second sidewall layer.

10 . The semiconductor device as claimed in claim 1 , further comprising a trench isolation region interposed between adjacent bit lines and provided in the opening.

11 . A method of fabricating a semiconductor device comprising the steps of:

forming a bit line in a semiconductor substrate;

forming an ONO film on the semiconductor substrate;

forming an opening in the ONO film;

forming an interlayer insulating layer on the ONO film; and

forming a contact hole connected to the bit line in the interlayer insulating film and the ONO film,

wherein the step of forming the contact hole separates the ONO film from the contact hole so that an insulation film remains between the ONO film and the contact hole.

12 . The method as claimed in claim 11 , wherein the step of forming the opening in the ONO film comprises a step of partially removing the ONO film with a mask composed of a word line provided on the ONO film and a first sidewall layer provided on a side of the word line.

13 . The method as claimed in claim 11 , wherein the step of forming the opening in the ONO film forms the opening above the bit line.

14 . The method as claimed in claim 11 , further comprising a step of forming a second sidewall layer on a side of the opening.

15 . The method as claimed in claim 11 , further comprising a step of forming a trench isolation region in the semiconductor substrate prior to the step of forming the bit line, the trench isolation region being interposed between adjacent bit lines and provided in the opening in the ONO film.

Assignments (6)
CORRECTIVE ASSIGNMENT TO CORRECT THE 8647899 PREVIOUSLY RECORDED ON REEL 035240 FRAME 0429. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY INTERST. Recorded Nov 3, 2020
From: CYPRESS SEMICONDUCTOR CORPORATION; SPANSION LLC
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 058002/0470 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 11, 2015
From: SPANSION LLC
To: CYPRESS SEMICONDUCTOR CORPORATION
Reel/Frame 035888/0807 →
SECURITY INTEREST Recorded Mar 21, 2015
From: CYPRESS SEMICONDUCTOR CORPORATION; SPANSION LLC
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 035240/0429 →
RELEASE OF SECURITY INTEREST Recorded Mar 13, 2015
From: BARCLAYS BANK PLC
To: SPANSION LLC; SPANSION INC.; SPANSION TECHNOLOGY LLC
Reel/Frame 035201/0159 →
SECURITY AGREEMENT Recorded Jun 4, 2010
From: SPANSION LLC; SPANSION INC.; SPANSION TECHNOLOGY INC.; SPANSION TECHNOLOGY LLC
To: BARCLAYS BANK PLC
Reel/Frame 024522/0338 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 21, 2006
From: TAKAGUCHI, NAOKI; MIZUGUCHI, YUJI; OKANISHI, MASATOMI; TAKAMATSU, TSUKASA
To: SPANSION LLC
Reel/Frame 018155/0777 →