IP Library Granted Patent US 7,315,052
Granted Patent B2
US 7,315,052 · App. 11/368,092 · Granted Jan 1, 2008

Power FET with embedded body pickup

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Quick Facts
Patent No.
US 7,315,052
App. No.
11/368,092
Granted
Jan 1, 2008
Kind
B2
Abstract

A power transistor formed on a semiconductor substrate and including a lateral array of polysilicon lines separated by alternating source and drain regions includes one or more body contact diffusion regions formed in the source regions where each body contact diffusion region has a length that extends to the edges of the two adjacent polysilicon lines, and one or more body pickup contacts where each body pickup contact is formed over a respective body contact diffusion region. In one embodiment, the body contact diffusion regions are formed in a fabrication process using ion implantation of dopants of a first type through a body diffusion mask. Each body contact diffusion region defined by an exposed area in the body diffusion mask has a drawn area that overlaps the respective two adjacent polysilicon lines.

Claims (15)

1. A power transistor formed on a semiconductor substrate and including a lateral array of polysilicon lines separated by alternating source and drain regions, the power transistor comprising:

one or more elongated body contact diffusion regions formed in areas of the source regions not receiving the source diffusion, each elongated body contact diffusion region having a rectangular shape with a width that extends in parallel with the edges of the two adjacent polysilicon lines and a length that extends perpendicular to the edges of the two adjacent polysilicon lines and having a dopant type opposite to the dopant type of the source region; and

one or more body pickup contacts, each body pickup contact formed only over a respective body contact diffusion region,

wherein the body contact diffusion regions are formed in a fabrication process using ion implantation of dopants of a first type through a body diffusion mask, each body contact diffusion region defined by an exposed area in the body diffusion mask having a drawn area that overlaps the respective two adjacent polysilicon lines.

2. The power transistor of claim 1 , wherein the drawn area of the body contact diffusion region in the body diffusion mask overlaps each of the two adjacent polysilicon lines by about 30% of the length of the polysilicon lines.

3. The power transistor of claim 1 , wherein the source and drain regions are formed in the fabrication process using ion implantation of a dopants of a second type, opposite to the first type, through a source/drain diffusion mask, the source/drain diffusion mask being an inverse of the body diffusion mask and including covered areas corresponding to the drawn areas of the body contact diffusion regions.

4. The power transistor of claim 3 , wherein the power transistor comprises an N-channel power transistor and the body contact diffusion regions are formed using P-type dopants while the source and drain regions are formed using N-type dopants.

5. The power transistor of claim 3 , wherein the power transistor comprises a P-channel power transistor and the body contact diffusion regions are formed using N-type dopants while the source and drain regions are formed using P-type dopants.

6. The power transistor of claim 1 , further comprising:

one or more source contacts formed in the source regions, the source contacts being formed separate from the body pickup contacts; and

a metal line connecting the source contacts and the body pickup contacts formed in each source region.

7. The power transistor of claim 6 , wherein in each source region, a body contact diffusion regions and a body pickup contact are included for every N numbers of source contacts.

8. The power transistor of claim 7 , wherein N is 5 or greater.

9. The power transistor of claim 1 , wherein the body contact diffusion regions each has a width that is at least the same as the size of the body pickup contact.

10. The power transistor of claim 9 , wherein the body contact diffusion regions each has a width that is at least twice the size of the body pickup contact.

Assignments (10)
INTELLECTUAL PROPERTY BUY-IN AGREEMENT/ASSIGNMENT Recorded Apr 4, 2023
From: MICREL LLC
To: MICROCHIP TECHNOLOGY INCORPORATED
Reel/Frame 063241/0771 →
RELEASE OF SECURITY INTEREST Recorded Mar 14, 2022
From: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS NOTES COLLATERAL AGENT
To: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
Reel/Frame 060894/0437 →
RELEASE OF SECURITY INTEREST Recorded Mar 11, 2022
From: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS NOTES COLLATERAL AGENT
To: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
Reel/Frame 059363/0001 →
RELEASE OF SECURITY INTEREST Recorded Mar 10, 2022
From: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS NOTES COLLATERAL AGENT
To: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
Reel/Frame 059863/0400 →
SECURITY INTEREST Recorded Jun 4, 2021
From: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
To: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS NOTES COLLATERAL AGENT
Reel/Frame 057935/0474 →
SECURITY INTEREST Recorded Dec 24, 2020
From: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
To: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS COLLATERAL AGENT
Reel/Frame 055671/0612 →
SECURITY INTEREST Recorded Jun 5, 2020
From: MICROCHIP TECHNOLOGY INC.; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
To: WELLS FARGO BANK, NATIONAL ASSOCIATION
Reel/Frame 053468/0705 →
RELEASE OF SECURITY INTEREST Recorded May 30, 2020
From: JPMORGAN CHASE BANK, N.A, AS ADMINISTRATIVE AGENT
To: MICROCHIP TECHNOLOGY INC.; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
Reel/Frame 053466/0011 →
SECURITY INTEREST Recorded Apr 24, 2020
From: MICROCHIP TECHNOLOGY INC.; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
To: JPMORGAN CHASE BANK, N.A., AS ADMINISTRATIVE AGENT
Reel/Frame 053311/0305 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 2, 2006
From: ALTER, MARTIN
To: MICREL, INC.
Reel/Frame 017648/0975 →