IP Library Granted Patent US 8,829,661
Granted Patent B2
US 8,829,661 · App. 11/372,666 · Granted Sep 9, 2014

Warp compensated package and method

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Quick Facts
Patent No.
US 8,829,661
App. No.
11/372,666
Granted
Sep 9, 2014
Kind
B2
Abstract

Methods and apparatus are provided for an electronic panel assembly (EPA) ( 82, 83 ), comprising: providing one or more electronic devices ( 30 ) with primary faces ( 31 ) having electrical contacts ( 36 ), opposed rear faces ( 33 ) and edges ( 32 ) therebetween. The devices ( 30 ) are mounted primary faces ( 31 ) down on a temporary support ( 60 ) in openings ( 44 ) in a warp control sheet (WCS) ( 40 ) attached to the support ( 60 ). Plastic encapsulation ( 50 ) is formed at least between lateral edges ( 32, 43 ) of the devices ( 30 ) and WCS openings ( 44 ). Undesirable panel warping ( 76 ) during encapsulation is mitigated by choosing the WCS coefficient of thermal expansion (CTE) to be less than the encapsulation CTE. After encapsulation cure, the EPA ( 82 ) containing the devices ( 30 ) and the WCS ( 40 ) is separated from the temporary support ( 60 ) and, optionally, mounted on another carrier ( 70 ) with electrical contacts ( 36 ) exposed. Thin film insulators ( 85 ) and conductors ( 87 ) are desirably applied to couple electrical contacts ( 36 ) on various devices ( 30 ) to each other and to external terminals ( 88 ), thereby forming an integrated multi-device EPA ( 84 ).

Claims (49)

1. A method for forming an electrical assembly, comprising:

providing multiple electronic devices with primary faces where electrical contacts are located, opposed rear faces, and edges extending between the primary and rear faces;

providing a perforated warp control sheet having multiple openings therein sized to accept the multiple electronic devices and having a first coefficient of thermal expansion (CTE);

providing a temporary support adapted to receive the multiple electronic devices and the perforated warp control sheet on a principal surface thereof;

then in either order, placing the perforated warp control sheet and the multiple electronic devices on the principal surface of the temporary support, with the multiple electronic devices in the openings in the perforated warp control sheet so that gaps are located between the edges of the electronic devices and edges of the openings in the perforated warp control sheet, and wherein the primary faces of the electronic devices are oriented toward the principal surface of the temporary support;

providing plastic encapsulation material at least in the gaps, wherein a characteristic of the plastic encapsulation material is that a second CTE of the plastic encapsulation material is equal or greater than the first CTE;

curing the plastic encapsulation material, wherein the characteristic that the second CTE is equal to or greater than the first CTE results, after curing, in a panel containing the multiple electronic devices and the perforated warp control sheet having a convex warp wherein a first surface of the panel at which the primary faces are exposed has a convex curve; and

separating the devices, the perforated warp control sheet and the plastic encapsulation in the gaps from the temporary support, thereby providing the panel containing the multiple electronic devices and the perforated warp control sheet joined by the plastic encapsulation.

2. The method of claim 1 , further comprising after the separating step:

applying one or more insulating layers at least over the primary electrical faces of the devices in the panel;

providing vias through some of the one or more insulating layers to various electrical contacts of the devices; and

forming conductors over one or more of the insulating layers and through one or more of the vias to interconnect various electrical contacts together or to external terminals or both, thereby providing an integrated electrical assembly.

3. The method of claim 1 , wherein the steps of providing a perforated warp control sheet and providing a plastic encapsulation comprise, providing a perforated warp control sheet and a plastic encapsulation having relative first and second coefficients of thermal expansion such that after encapsulation and separation any warp of the panel is convex.

4. The method of claim 1 , wherein the convex warp is less than about 5% of the lateral extent of the panel.

5. The method of claim 4 , wherein the convex warp is less than about 2% of the lateral extent of the panel.

6. The method of claim 1 , wherein the first CTE in the range of 50-95% of the second CTE.

7. The method of claim 6 , wherein the first CTE in the range of 55-85% of the second CTE.

8. The method of claim 1 , wherein the step of providing plastic encapsulation at least in the gaps, comprises, providing the plastic encapsulation in the gaps and over rear faces of the multiple electronic devices and the perforated warp control sheet, and then backgrinding the plastic encapsulation to expose the rear faces of the multiple electronic devices.

9. The method of claim 1 , wherein the first CTE is in the range of about 6.5-12.4 ppm/° C.

10. The method of claim 1 , wherein the first CTE is in the range of about 7.2-11.1 ppm/° C.

11. The method of claim 1 , further comprising:

mounting the panel on an upper surface of an alignment chuck so that a second surface of the panel, which is opposed to the first surface of the panel and has a concave curve, is facing the upper surface of the alignment chuck;

applying a vacuum to the alignment chuck to pull the panel flat against the upper surface of the alignment chuck;

applying one or more insulating layers over the primary faces of the multiple electronic devices;

opening vias to at least some of the electrical contacts; and

providing conductive interconnects extending through some of the vias in the one or more insulating layers to electrically couple some of the electrical contacts to each other or to external connections to the panel or both.

12. A method for forming an integrated electronic panel assembly (IEPA) having multiple electronic devices, comprising:

providing multiple electronic devices with first faces having bonding pads thereon, opposed rear faces, and edges extending between the first faces and rear faces;

providing a temporary support having a principal face;

providing a warp control plane having openings therein adapted to receive the multiple electronic devices, wherein the warp control plane has a characteristic that a first coefficient of thermal expansion (CTE) of the warp control plane is less than a second CTE;

mounting the warp control plane and the multiple electronic devices on the temporary support with the multiple electronic devices located in the openings in the warp control plane with their bonding pads oriented toward the principal face, and wherein a gap separates the edges of each of the multiple electronic devices from each opening in the warp control plane;

providing plastic encapsulation having the second CTE at least between edges of the multiple electronic devices and the openings in the warp control plane on the temporary support;

curing the plastic encapsulation at least sufficiently to substantially fix the multiple electronic devices and the warp control plane in the encapsulation, thereby forming a panel of multiple electronic devices on the temporary support, wherein the characteristic that the first CTE is less than the second CTE results in the panel, after curing, having a convex warp wherein a first surface of the panel at which the first faces are exposed has a convex curve;

separating the panel from the temporary support so that the bonding pads are exposed; and

connecting some of the bonding pads on the panel to each other or to external terminals or both.

13. The method of claim 12 , further comprising after the separating step and before the interconnecting step mounting the panel on a carrier with the rear faces of the multiple electronic devices facing the carrier and the bonding pads exposed.

14. The method of claim 13 , wherein the interconnecting step comprises:

applying one or more insulating layers over the multiple electronic devices;

opening vias to at least some of the bonding pads; and

providing conductive interconnects extending through some of the vias in the one or more insulating layers to electrically couple some of the bonding pads to each other or to external connections to the panel or both.

15. The method of claim 12 , wherein the warp control plane comprises a nickel-iron alloy with between about 40-52% nickel.

16. The method of claim 12 , wherein the first CTE is in the range of about 50-95% of the second CTE.

17. The method of claim 12 , wherein the first CTE is in the range of about 55-85% of the second CTE.

18. The method of claim 12 , further comprising:

mounting the panel on an upper surface of an alignment chuck so that a second surface of the panel, which is opposed to the first surface of the panel and has a concave curve, is facing the upper surface of the alignment chuck;

applying a vacuum to the alignment chuck to pull the panel flat against the upper surface of the alignment chuck;

applying one or more insulating layers over the first faces of the multiple electronic devices;

opening vias to at least some of the bonding pads; and

providing conductive interconnects extending through some of the vias in the one or more insulating layers to electrically couple some of the bonding pads to each other or to external connections to the panel or both.

Assignments (22)
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 11759915 AND REPLACE IT WITH APPLICATION 11759935 PREVIOUSLY RECORDED ON REEL 040925 FRAME 0001. ASSIGNOR(S) HEREBY CONFIRMS THE RELEASE OF SECURITY INTEREST. Recorded Feb 17, 2020
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP, B.V. F/K/A FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 052917/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 11759915 AND REPLACE IT WITH APPLICATION 11759935 PREVIOUSLY RECORDED ON REEL 040928 FRAME 0001. ASSIGNOR(S) HEREBY CONFIRMS THE RELEASE OF SECURITY INTEREST. Recorded Jan 17, 2020
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP B.V.
Reel/Frame 052915/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 11759915 AND REPLACE IT WITH APPLICATION 11759935 PREVIOUSLY RECORDED ON REEL 037486 FRAME 0517. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS. Recorded Dec 10, 2019
From: CITIBANK, N.A.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 053547/0421 →
RELEASE OF SECURITY INTEREST Recorded Sep 10, 2019
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP B.V.
Reel/Frame 050744/0097 →
CORRECTIVE ASSIGNMENT TO CORRECT THE TO CORRECT THE APPLICATION NO. FROM 13,883,290 TO 13,833,290 PREVIOUSLY RECORDED ON REEL 041703 FRAME 0536. ASSIGNOR(S) HEREBY CONFIRMS THE THE ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS.. Recorded Feb 20, 2019
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: SHENZHEN XINGUODU TECHNOLOGY CO., LTD.
Reel/Frame 048734/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE PATENTS 8108266 AND 8062324 AND REPLACE THEM WITH 6108266 AND 8060324 PREVIOUSLY RECORDED ON REEL 037518 FRAME 0292. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS. Recorded Feb 1, 2017
From: CITIBANK, N.A.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 041703/0536 →
CORRECTIVE ASSIGNMENT TO CORRECT THE NATURE OF CONVEYANCE LISTED CHANGE OF NAME SHOULD BE MERGER AND CHANGE PREVIOUSLY RECORDED AT REEL: 040652 FRAME: 0180. ASSIGNOR(S) HEREBY CONFIRMS THE MERGER AND CHANGE OF NAME. Recorded Jan 12, 2017
From: FREESCALE SEMICONDUCTOR INC.
To: NXP USA, INC.
Reel/Frame 041354/0148 →
CHANGE OF NAME Recorded Nov 8, 2016
From: FREESCALE SEMICONDUCTOR INC.
To: NXP USA, INC.
Reel/Frame 040652/0180 →
RELEASE OF SECURITY INTEREST Recorded Nov 7, 2016
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP B.V.
Reel/Frame 040928/0001 →
RELEASE OF SECURITY INTEREST Recorded Sep 21, 2016
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP, B.V., F/K/A FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 040925/0001 →
SUPPLEMENT TO THE SECURITY AGREEMENT Recorded Jun 16, 2016
From: FREESCALE SEMICONDUCTOR, INC.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 039138/0001 →
ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS Recorded Jan 13, 2016
From: CITIBANK, N.A.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 037518/0292 →
ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS Recorded Jan 12, 2016
From: CITIBANK, N.A.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 037486/0517 →
PATENT RELEASE Recorded Dec 21, 2015
From: CITIBANK, N.A., AS COLLATERAL AGENT
To: FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 037356/0143 →
PATENT RELEASE Recorded Dec 21, 2015
From: CITIBANK, N.A., AS COLLATERAL AGENT
To: FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 037356/0553 →
PATENT RELEASE Recorded Dec 21, 2015
From: CITIBANK, N.A., AS COLLATERAL AGENT
To: FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 037354/0225 →
SECURITY AGREEMENT Recorded Nov 6, 2013
From: FREESCALE SEMICONDUCTOR, INC.
To: CITIBANK, N.A., AS NOTES COLLATERAL AGENT
Reel/Frame 031591/0266 →
SECURITY AGREEMENT Recorded Jun 18, 2013
From: FREESCALE SEMICONDUCTOR, INC.
To: CITIBANK, N.A., AS NOTES COLLATERAL AGENT
Reel/Frame 030633/0424 →
SECURITY AGREEMENT Recorded May 13, 2010
From: FREESCALE SEMICONDUCTOR, INC.
To: CITIBANK, N.A., AS COLLATERAL AGENT
Reel/Frame 024397/0001 →
SECURITY AGREEMENT Recorded Mar 15, 2010
From: FREESCALE SEMICONDUCTOR, INC.
To: CITIBANK, N.A.
Reel/Frame 024085/0001 →
SECURITY AGREEMENT Recorded Feb 2, 2007
From: FREESCALE SEMICONDUCTOR, INC.; FREESCALE ACQUISITION CORPORATION; FREESCALE ACQUISITION HOLDINGS CORP.; FREESCALE HOLDINGS (BERMUDA) III, LTD.
To: CITIBANK, N.A. AS COLLATERAL AGENT
Reel/Frame 018855/0129 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 10, 2006
From: LYTLE, WILLIAM H.; HAYES, SCOTT M.; LEAL, GEORGE R.
To: FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 017677/0730 →