Method for forming a non-volatile memory and a peripheral device on a semiconductor substrate
View Patent ↗A method for forming a semiconductor device includes forming a first gate electrode over a semiconductor substrate, wherein the first gate electrode comprises silicon and forming a second gate electrode over the semiconductor substrate and adjacent the first gate electrode, wherein the second gate electrode comprises silicon. Nanoclusters are present in the first gate electrode. A peripheral transistor area is formed devoid of nanoclusters.
1. A method for forming a semiconductor device, the method comprising:
providing a semiconductor substrate;
forming a layer of nanoclusters overlying the semiconductor substrate wherein the layer comprises a first portion and a second portion;
forming a first gate electrode over the semiconductor substrate, wherein the first gate electrode comprises silicon and the first portion of the layer of nanoclusters;
removing the second portion of the layer of nanoclusters;
forming a second gate electrode over the semiconductor substrate and adjacent the first gate electrode, wherein the second gate electrode comprises silicon;
forming a first silicon containing layer over the semiconductor substrate; and
patterning at least a portion of the first silicon containing layer to form a peripheral electrode area.
2. The method of claim 1 , wherein forming the second gate electrode comprises polishing the gate electrode material.
3. The method of claim 2 , wherein the second gate electrode is further comprised of a polysilicon layer overlying a gate oxide layer.
4. The method of claim 1 , wherein the first gate electrode and the second gate electrode comprise a nonvolatile memory device.
5. The method of claim 4 , wherein the second gate electrode is devoid of nanoclusters.
6. The method of claim 4 , wherein a first layer of dielectric is formed overlying the first gate electrode and the second gate electrode.
7. The method of claim 6 , wherein the first layer of dielectric is an oxide.
8. The method of claim 1 , wherein forming the layer of nanoclusters overlying the semiconductor substrate further comprises:
forming the layer of nanoclusters with densities between a range of 5×10 11 cm −2 to 1.1×10 12 cm −2 ; and
forming the layer of nanoclusters with diameters between approximately 50-150 Å.
9. A method for forming a semiconductor device, the method comprising:
providing a semiconductor substrate;
forming a layer of nanoclusters overlying the semiconductor substrate wherein the layer comprises a first portion and a second portion;
forming a first gate electrode over the semiconductor substrate, wherein the first gate electrode comprises silicon and the first portion of the layer of nanoclusters;
removing the second portion of the layer of nanoclusters;
forming a second gate electrode over the semiconductor substrate and adjacent the first gate electrode, wherein the second gate electrode comprises silicon;
forming a dielectric layer overlying the first gate electrode and the second gate electrode;
forming a first silicon containing layer over the semiconductor substrate; and
patterning at least a portion of the first silicon containing layer to form a peripheral electrode area.
10. The method of claim 9 , wherein the dielectric layer comprises an oxide.
11. The method of claim 10 , wherein the peripheral electrode area further comprises a low voltage transistor.
12. The method of claim 10 , wherein the peripheral electrode area further comprises an input/output transistor.
13. The method of claim 9 , wherein patterning at least a portion of the first silicon containing layer to form the peripheral electrode area further comprises:
forming a transistor gate oxide overlying the semiconductor substrate; and
forming a high voltage transistor area overlying the transistor gate oxide.
14. The method of claim 13 , wherein the peripheral electrode area comprises multiple thicknesses of the transistor gate oxide.
15. The method of claim 9 , wherein the dielectric layer is deposited by chemical vapor deposition.
16. A method for forming a semiconductor device, the method comprising:
providing a semiconductor substrate;
forming a layer of nanoclusters overlying the semiconductor substrate;
forming a control gate overlying the layer of nanoclusters;
removing a first portion of the layer of nanoclusters to form a first region devoid of nanoclusters;
forming a select gate overlying the first region devoid of nanoclusters;
removing a second portion of the layer of nanoclusters to form a second region devoid of nanoclusters; and
forming a peripheral electrode area overlying the second region devoid of nanoclusters.
17. The method of claim 16 , wherein the layer of nanoclusters are silicon, silicon-germanium, aluminum, gold, or other types of conductive material or doped or undoped semiconductive material.
18. The method of claim 16 , wherein forming the layer of nanoclusters overlying the semiconductor substrate further comprises:
forming the layer of nanoclusters with densities between a range of 5×10 11 cm −2 to 1.1×10 12 cm −2 ; and
forming the layer of nanoclusters with diameters between approximately 50-150 Å.
19. The method of claim 16 , wherein the peripheral electrode area consists of a high voltage transistor area, an input/output transistor area, and a low voltage transistor area.
20. The method of claim 16 , wherein the select gate is silicided.