IP Library Granted Patent US 8,601,683
Granted Patent B2
US 8,601,683 · App. 11/379,256 · Granted Dec 10, 2013

Method for electrical interconnection between printed wiring board layers using through holes with solid core conductive material

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Quick Facts
Patent No.
US 8,601,683
App. No.
11/379,256
Granted
Dec 10, 2013
Kind
B2
Abstract

The present invention provides method of manufacture for a printed wiring board. The printed wiring board constructed according to the teachings of the present invention includes a printed wiring board dielectric layer having conductive foils located on at least two sides thereof. The printed wiring board further includes a solid core conductive material interconnecting the conductive foils.

Claims (13)

1. A method for manufacturing a printed wiring board, comprising:

providing a printed wiring board dielectric layer having conductive foils located on at least two sides thereof;

inserting a solid core conductive material within said printed wiring board dielectric layer, including:

inserting a sharp hollow object containing said solid core conductive material therein within said printed wiring board dielectric; and

removing said sharp hollow object from said printed wiring board dielectric leaving said solid core conductive material therein thereby interconnecting said conductive foils.

2. The method as recited in claim 1 wherein inserting a solid core conductive material within said printed wiring board dielectric layer includes inserting a solid core wire within said printed wiring board dielectric layer.

3. The method as recited in claim 2 wherein inserting a solid core wire within said printed wiring board dielectric layer includes inserting a solid core copper wire within said printed wiring board dielectric layer.

4. The method as recited in claim 1 wherein said solid core conductive material has a diameter ranging from about 0.050 mm to about 0.200 mm.

5. The method as recited in claim 4 wherein said solid core conductive material has a diameter ranging from about 0.100 mm to about 0.150 mm.

6. The method as recited in claim 1 wherein inserting a solid core conductive material within said printed wiring board dielectric layer using a sharp hollow object includes inserting a solid core conductive material within said printed wiring board dielectric layer using a needle.

7. The method as recited in claim 1 further including increasing a temperature of said printed wiring board dielectric substrate prior to inserting said solid core conductive material within said printed wiring board dielectric layer.

8. The method as recited in claim 7 wherein said temperature ranges from about 50° C. to a temperature less than a glass transition temperature of said printed wiring board dielectric layer.

9. The method as recited in claim 1 wherein said printed wiring board dielectric layer is a first dielectric layer and first and second conductive foils are located on opposing sides thereof, and further including forming a second dielectric layer and third conductive foil contacting said first conductive foil and a third dielectric layer and a fourth conductive foil contacting said second conductive foil, wherein said solid core conductive material interconnects said first, second, third and fourth conductive foils.

Assignments (9)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 4, 2019
From: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.; BROADCOM CORPORATION
To: BELL SEMICONDUCTOR, LLC
Reel/Frame 050635/0001 →
SECURITY INTEREST Recorded Feb 1, 2018
From: HILCO PATENT ACQUISITION 56, LLC; BELL SEMICONDUCTOR, LLC; BELL NORTHERN RESEARCH, LLC
To: CORTLAND CAPITAL MARKET SERVICES LLC, AS COLLATERAL AGENT
Reel/Frame 045216/0020 →
TERMINATION AND RELEASE OF SECURITY INTEREST IN PATENTS Recorded Feb 3, 2017
From: BANK OF AMERICA, N.A., AS COLLATERAL AGENT
To: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
Reel/Frame 041710/0001 →
PATENT SECURITY AGREEMENT Recorded Feb 11, 2016
From: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
To: BANK OF AMERICA, N.A., AS COLLATERAL AGENT
Reel/Frame 037808/0001 →
TERMINATION AND RELEASE OF SECURITY INTEREST IN PATENT RIGHTS (RELEASES RF 032856-0031) Recorded Feb 2, 2016
From: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
To: LSI CORPORATION; AGERE SYSTEMS LLC
Reel/Frame 037684/0039 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 3, 2015
From: AGERE SYSTEMS LLC
To: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
Reel/Frame 035365/0634 →
PATENT SECURITY AGREEMENT Recorded May 8, 2014
From: LSI CORPORATION; AGERE SYSTEMS LLC
To: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
Reel/Frame 032856/0031 →
CERTIFICATE OF FORMATION/CERTIFICATE OF CONVERSION Recorded Nov 7, 2013
From: AGERE SYSTEMS INC.
To: AGERE SYSTEMS LLC
Reel/Frame 031598/0918 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 19, 2006
From: COHN, CHARLES; KLEMOVAGE, JEFFREY M.
To: AGERE SYSTEMS INC.
Reel/Frame 017493/0706 →