IP Library Granted Patent US 7,302,358
Granted Patent B2
US 7,302,358 · App. 11/383,972 · Granted Nov 27, 2007

Automatic test equipment operating architecture

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Quick Facts
Patent No.
US 7,302,358
App. No.
11/383,972
Granted
Nov 27, 2007
Kind
B2
Abstract

An integrated circuit testing device, such as an ATE, configured with an architecture comprising a distinct software layer and a distinct hardware layer with an interface for tester abstraction providing a communication conduit between the software layer and the hardware layer. The software layer communicates in device under test terms whereas the hardware layer communicates in the terms of the testing apparatus. Various communication interface points are provided to the software and hardware layers, as well as the interface for tester abstraction.

Claims (24)

1. A method of controlling an automatic test equipment comprising:

receiving a block definition of an automatic test equipment instrument in device under test terms, the block definition comprising at least one indication of a parameter of the automatic test equipment instrument, the block definition further comprises a device term definition of trigger;

translating the device under test terms to automatic test equipment instrument terms; and

programming the automatic test equipment instrument in accordance with the block definition.

2. The method of claim 1 further comprising the operation of parsing the block definition.

3. The method of claim 2 further comprising the operation of resolving the block definition.

4. The method of claim 3 further comprising the operation of translating the resolved block information to an identification of the automatic test equipment instrument.

5. The method of claim 4 further comprising the operation of translating the resolved block information to instrument term values.

6. The method of claim 5 further comprising the operation of programming the automatic test equipment instrument in accordance with the instrument term values.

7. The method of claim 6 further comprising:

commanding the automatic test instrument to apply a stimulus to the device under test; and

receiving a response from the device under test.

8. The method of claim 7 further comprising:

comparing the response from the device under test with an expected response for the device under test.

9. The method of claim 1 wherein the automatic test equipment instrument is selected from the group consisting of power supply instrument, digital test stimulus instrument and analog test stimulus instrument.

10. The method of claim 1 wherein the automatic test equipment instrument further comprises at least one first connection adapted to apply a stimulus to at least one input pin of a device under test.

11. The method of claim 10 wherein the automatic test equipment instrument further comprises at least one second connection adapted to receive at least one output response from one or more output pins of the device under test.

12. The method of claim 1 wherein the block definition further comprises a device term definition of alarm.

13. The method of claim 12 wherein the block definition further comprises a device term definition selected from the group consisting of analog, connect, timing, capture and pattern.

14. An automatic test equipment configured to perform the method of claim 1 .

15. A method of controlling an automatic test equipment comprising:

receiving a block definition of an automatic test instrument in device under test terms, the block definition comprises at least one indication of a parameter of the automatic test equipment instrument in device under test terms, the block definition further comprises a device term definition of trigger;

converting the at least one parameter from device under test terms to automatic test equipment instrument terms; and

programming the automatic test equipment instrument in accordance with the at least one parameter.

Assignments (9)
TERMINATION AND RELEASE OF SECURITY INTEREST IN PATENTS, RECORDED AT REEL 047185, FRAME 0624 Recorded Mar 7, 2024
From: DEUTSCHE BANK AG NEW YORK BRANCH, AS AGENT
To: XCERRA CORPORATION
Reel/Frame 066762/0811 →
CORRECTIVE ASSIGNMENT TO CORRECT THE INCORRECT STATEMENT THAT THIS DOCUMENT SERVES AS AN OATH/DECLARATION PREVIOUSLY RECORDED ON REEL 047185 FRAME 0628. ASSIGNOR(S) HEREBY CONFIRMS THE PATENT SECURITY AGREEMENT. Recorded Nov 28, 2018
From: XCERRA CORPORATION
To: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
Reel/Frame 047675/0354 →
PATENT SECURITY AGREEMENT Recorded Oct 2, 2018
From: XCERRA CORPORATION
To: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
Reel/Frame 047185/0624 →
CORRECTIVE ASSIGNMENT TO CORRECT THE INCORRECT PATENT NUMBER 7261561 AND REPLACE WITH PATENT NUMBER 7231561 PREVIOUSLY RECORDED ON REEL 034660 FRAME 0188. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY AGREEMENT. Recorded Feb 11, 2016
From: XCERRA CORPORATION; EVERETT CHARLES TECHNOLOGIES LLC
To: SILICON VALLEY BANK, AS ADMINISTRATIVE AGENT
Reel/Frame 037824/0372 →
SECURITY AGREEMENT Recorded Dec 18, 2014
From: XCERRA CORPORATION; EVERETT CHARLES TECHNOLOGIES LLC
To: SILICON VALLEY BANK, AS ADMINISTRATIVE AGENT
Reel/Frame 034660/0188 →
RELEASE OF SECURITY INTEREST IN UNITED STATES PATENTS Recorded Dec 18, 2014
From: SILICON VALLEY BANK, AS ADMINISTRATIVE AGENT
To: XCERRA CORPORATION; EVERETT CHARLES TECHNOLOGIES LLC
Reel/Frame 034660/0394 →
CHANGE OF NAME Recorded May 27, 2014
From: LTX-CREDENCE CORPORATION
To: XCERRA CORPORATION
Reel/Frame 033032/0768 →
SECURITY AGREEMENT Recorded Jan 17, 2014
From: LTX-CREDENCE CORPORATION; EVERETT CHARLES TECHNOLOGIES LLC
To: SILICON VALLEY BANK, AS ADMINISTRATIVE AGENT
Reel/Frame 032086/0476 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 5, 2006
From: FRITZSCHE, WILLIAM A.
To: CREDENCE SYSTEMS CORPORATION
Reel/Frame 017721/0807 →