IP Library Granted Patent US 9,304,773
Granted Patent B2
US 9,304,773 · App. 11/385,463 · Granted Apr 5, 2016

Data processor having dynamic control of instruction prefetch buffer depth and method therefor

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Quick Facts
Patent No.
US 9,304,773
App. No.
11/385,463
Granted
Apr 5, 2016
Kind
B2
Abstract

A data processor ( 102 ) includes a prefetch buffer ( 112 ) and a fetch control unit ( 116 ). The prefetch buffer ( 112 ) has a plurality of lines. The prefetch buffer ( 112 ) has a variable maximum depth that defines a number of lines of the plurality of lines that are capable of storing instructions. The fetch control unit ( 116 ) is coupled to the prefetch buffer to monitor at least one of the plurality of lines of the prefetch buffer ( 112 ) and to adjust the variable maximum depth of the prefetch buffer ( 112 ) in response to a state of the data processor ( 102 ).

Claims (43)

1. A data processor comprising:

a prefetch buffer comprising a plurality of lines, the prefetch buffer to store instructions in a first-in, first-out (FIFO) fashion and the prefetch buffer having a variable maximum depth that defines a number of lines of the plurality of lines that are capable of storing instructions; and

a fetch control unit coupled to the prefetch buffer to adjust, during operation of the data processor, the variable maximum depth of the prefetch buffer in response to an instruction type, wherein the fetch control unit is further configured to adjust the variable maximum depth in response to a starvation condition of the prefetch buffer.

2. The data processor of claim 1 , wherein the fetch control unit further is to monitor a first line of the prefetch buffer, determined by the variable maximum depth, and to initiate an instruction fetch when the first line is empty.

3. The data processor of claim 1 , wherein the fetch control unit is adapted to set the variable maximum depth of the prefetch buffer to a first predetermined depth or to a second predetermined depth.

4. The data processor of claim 1 wherein the fetch control unit sets the variable maximum depth of the prefetch buffer to a first predetermined depth or a second predetermined depth in response to the instruction type.

5. The data processor of claim 4 , wherein the instruction type comprises one of 32-bit instructions and 16-bit instructions.

6. The data processor of claim 1 , wherein the starvation condition comprises a frequency of instruction starvation exceeding a threshold and the fetch control unit increases the variable maximum depth in response to the starvation condition.

7. The data processor of claim 1 , wherein the starvation condition comprises whether the prefetch buffer is not averaging close to starvation.

8. The data processor of claim 7 , wherein the fetch control unit determines whether the prefetch buffer is averaging close to starvation by monitoring a state of a plurality of lines of the prefetch buffer.

9. A data processor comprising:

a register for storing an instruction prefetch control value that indicates that the data processor is operating in a selected one of a plurality of modes;

a prefetch buffer comprising a plurality of lines, the prefetch buffer to store instructions in a first-in, first-out (FIFO) fashion and the prefetch buffer having a variable maximum depth that defines a number of lines of the plurality of lines that are capable of storing instructions; and

a fetch control unit coupled to the prefetch buffer and to the register, the fetch control unit controlling the variable maximum depth in response to the instruction prefetch control value and adjusting the variable maximum depth during operation of the data processor in response to a starvation condition of the prefetch buffer.

10. The data processor of claim 9 , wherein the fetch control unit sets the variable maximum depth of the prefetch buffer to a first predetermined depth or to a second predetermined depth in response to the instruction prefetch control value being respectively a first value or a second value.

11. The data processor of claim 9 , wherein the fetch control unit increases or decreases the variable maximum depth of the prefetch buffer dynamically in response to a starvation condition of the prefetch buffer.

12. A method comprising:

providing a data processor having a prefetch buffer to store instructions in a first-in, first-out (FIFO) fashion, the prefetch buffer having a plurality of lines;

setting, during operation of the data processor, a variable maximum depth of the prefetch buffer as a number of lines of the plurality of lines that are capable of storing instructions;

fetching instructions into the prefetch buffer using the variable maximum depth; and

dynamically adjusting the variable maximum depth in response to a state of the data processor based on a starvation condition of the prefetch buffer.

13. The method of claim 12 , wherein dynamically adjusting comprises:

monitoring a starvation condition of the prefetch buffer;

if a rate of starvation of the prefetch buffer exceeds a threshold, then increasing the variable maximum depth; and

if the prefetch buffer is not averaging close to starvation, then decreasing the variable maximum depth.

14. The method of claim 13 , further comprising:

outputting instructions from the prefetch buffer; and

decoding instructions so outputted for execution by the data processor.

15. A method comprising:

providing a data processor having a prefetch buffer to store instructions in a first-in, first-out (FIFO) fashion, the prefetch buffer having a plurality of lines;

setting a variable maximum depth of the prefetch buffer to a first predetermined depth;

fetching instructions of a first instruction type into the prefetch buffer;

subsequently fetching instructions of a second instruction type into the prefetch buffer;

changing the variable maximum depth of the prefetch buffer from the first predetermined depth to a second predetermined depth in response to fetching instructions of the second instruction type; and

adjusting the variable maximum depth in response to a starvation condition of the prefetch buffer.

16. The method of claim 15 , wherein fetching instructions of the first instruction type comprises fetching 32-bit instructions, and fetching instructions of the second instruction type comprises fetching 16-bit instructions.

17. The method of claim 15 , wherein fetching instructions of the first instruction type comprises fetching 32-bit instructions, and fetching instructions of the second instruction type comprises fetching variable-length instructions.

18. The method of claim 15 , wherein the adjusting the variable maximum depth in response to the starvation condition of the prefetch buffer comprises:

increasing the variable maximum depth in response to the starvation condition, wherein starvation condition comprises a frequency of instruction starvation exceeding a threshold.

19. The method of claim 15 , wherein the adjusting the variable maximum depth in response to the starvation condition of the prefetch buffer comprises:

adjusting the variable maximum depth in response to the prefetch buffer averaging close to starvation.

20. The method of claim 19 , wherein the adjusting the variable maximum depth in response to the prefetch buffer averaging close to starvation comprises:

monitoring a state of a plurality of lines of the prefetch buffer.

Assignments (26)
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 11759915 AND REPLACE IT WITH APPLICATION 11759935 PREVIOUSLY RECORDED ON REEL 040925 FRAME 0001. ASSIGNOR(S) HEREBY CONFIRMS THE RELEASE OF SECURITY INTEREST. Recorded Feb 17, 2020
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP, B.V. F/K/A FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 052917/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 11759915 AND REPLACE IT WITH APPLICATION 11759935 PREVIOUSLY RECORDED ON REEL 040928 FRAME 0001. ASSIGNOR(S) HEREBY CONFIRMS THE RELEASE OF SECURITY INTEREST. Recorded Jan 17, 2020
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP B.V.
Reel/Frame 052915/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 11759915 AND REPLACE IT WITH APPLICATION 11759935 PREVIOUSLY RECORDED ON REEL 037486 FRAME 0517. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS. Recorded Dec 10, 2019
From: CITIBANK, N.A.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 053547/0421 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 12298143 PREVIOUSLY RECORDED ON REEL 039361 FRAME 0212. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY AGREEMENT SUPPLEMENT. Recorded Oct 22, 2019
From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 051029/0387 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 12298143 PREVIOUSLY RECORDED ON REEL 042985 FRAME 0001. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY AGREEMENT SUPPLEMENT. Recorded Oct 22, 2019
From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 051029/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 12298143 PREVIOUSLY RECORDED ON REEL 038017 FRAME 0058. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY AGREEMENT SUPPLEMENT. Recorded Oct 22, 2019
From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 051030/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 12298143 PREVIOUSLY RECORDED ON REEL 042762 FRAME 0145. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY AGREEMENT SUPPLEMENT. Recorded Oct 22, 2019
From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 051145/0184 →
RELEASE OF SECURITY INTEREST Recorded Sep 10, 2019
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP B.V.
Reel/Frame 050745/0001 →
RELEASE OF SECURITY INTEREST Recorded Sep 10, 2019
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP B.V.
Reel/Frame 050744/0097 →
CORRECTIVE ASSIGNMENT TO CORRECT THE TO CORRECT THE APPLICATION NO. FROM 13,883,290 TO 13,833,290 PREVIOUSLY RECORDED ON REEL 041703 FRAME 0536. ASSIGNOR(S) HEREBY CONFIRMS THE THE ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS.. Recorded Feb 20, 2019
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: SHENZHEN XINGUODU TECHNOLOGY CO., LTD.
Reel/Frame 048734/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 12681366 PREVIOUSLY RECORDED ON REEL 039361 FRAME 0212. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY AGREEMENT SUPPLEMENT. Recorded May 9, 2017
From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 042762/0145 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 12681366 PREVIOUSLY RECORDED ON REEL 038017 FRAME 0058. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY AGREEMENT SUPPLEMENT. Recorded May 9, 2017
From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 042985/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE PATENTS 8108266 AND 8062324 AND REPLACE THEM WITH 6108266 AND 8060324 PREVIOUSLY RECORDED ON REEL 037518 FRAME 0292. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS. Recorded Feb 1, 2017
From: CITIBANK, N.A.
To: MORGAN STANLEY SENIOR FUNDING, INC.
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CORRECTIVE ASSIGNMENT TO CORRECT THE NATURE OF CONVEYANCE LISTED CHANGE OF NAME SHOULD BE MERGER AND CHANGE PREVIOUSLY RECORDED AT REEL: 040652 FRAME: 0180. ASSIGNOR(S) HEREBY CONFIRMS THE MERGER AND CHANGE OF NAME. Recorded Jan 12, 2017
From: FREESCALE SEMICONDUCTOR INC.
To: NXP USA, INC.
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CHANGE OF NAME Recorded Nov 8, 2016
From: FREESCALE SEMICONDUCTOR INC.
To: NXP USA, INC.
Reel/Frame 040652/0180 →
RELEASE OF SECURITY INTEREST Recorded Nov 7, 2016
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP B.V.
Reel/Frame 040928/0001 →
RELEASE OF SECURITY INTEREST Recorded Sep 21, 2016
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP, B.V., F/K/A FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 040925/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 12092129 PREVIOUSLY RECORDED ON REEL 038017 FRAME 0058. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY AGREEMENT SUPPLEMENT. Recorded Jul 14, 2016
From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 039361/0212 →
SUPPLEMENT TO THE SECURITY AGREEMENT Recorded Jun 16, 2016
From: FREESCALE SEMICONDUCTOR, INC.
To: MORGAN STANLEY SENIOR FUNDING, INC.
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SECURITY AGREEMENT SUPPLEMENT Recorded Mar 7, 2016
From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
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ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS Recorded Jan 13, 2016
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To: MORGAN STANLEY SENIOR FUNDING, INC.
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ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS Recorded Jan 12, 2016
From: CITIBANK, N.A.
To: MORGAN STANLEY SENIOR FUNDING, INC.
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PATENT RELEASE Recorded Dec 21, 2015
From: CITIBANK, N.A., AS COLLATERAL AGENT
To: FREESCALE SEMICONDUCTOR, INC.
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PATENT RELEASE Recorded Dec 21, 2015
From: CITIBANK, N.A., AS COLLATERAL AGENT
To: FREESCALE SEMICONDUCTOR, INC.
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PATENT RELEASE Recorded Dec 21, 2015
From: CITIBANK, N.A., AS COLLATERAL AGENT
To: FREESCALE SEMICONDUCTOR, INC.
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SECURITY AGREEMENT Recorded Nov 6, 2013
From: FREESCALE SEMICONDUCTOR, INC.
To: CITIBANK, N.A., AS NOTES COLLATERAL AGENT
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