IP Library Granted Patent US 7,683,480
Granted Patent B2
US 7,683,480 · App. 11/393,582 · Granted Mar 23, 2010

Methods and apparatus for a reduced inductance wirebond array

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Quick Facts
Patent No.
US 7,683,480
App. No.
11/393,582
Granted
Mar 23, 2010
Kind
B2
Abstract

A wirebond array ( 100 ) comprising a plurality of signal wires 110 and a plurality of ground wires ( 120 ) interdigitated with and substantially parallel to the set of signal wires ( 110 ). In one embodiment, each of the plurality of signal wires ( 110 ) and ground wires ( 120 ) is attached to a first semiconductor device ( 102 ) (e.g., a microwave power device). In another, each of the plurality of signal wires ( 110 ) is further attached to a package lead ( 104 ). In one embodiment, each of the plurality of ground wires ( 120 ) is further attached to a ground connection region ( 106 ) substantially coplanar with the package lead ( 104 ). Alternatively, each of the plurality of signal wires ( 110 ) is further attached to a second semiconductor device, wherein each of the plurality of ground wires ( 120 ) is further attached to the second semiconductor device.

Claims (29)

1. An apparatus that includes a wirebond array, the apparatus comprising:

a ground plane having a top surface;

a semiconductor device over a first portion of the top surface of the ground plane, wherein the semiconductor device includes a series of bond pads;

an isolator over a second portion of the top surface of the ground plane, wherein the isolator has a top surface, a face extending perpendicular from the ground plane to the top surface of the isolator, and an edge between the top surface of the isolator and the face;

a package lead on the top surface of the isolator;

a ground connection region on the top surface of the isolator and extending along the edge, wherein the ground connection region is substantially coplanar with the package lead;

a connector that electrically connects the ground connection region and the top surface of the ground plane, wherein the connector includes wrap-around metallization formed on the face of the isolator;

a plurality of signal wires; and

a plurality of ground wires interdigitated with and substantially parallel to the plurality of signal wires, wherein the plurality of signal wires and the plurality of ground wires have substantially the same loop heights so that the wirebond array operates as an impedance matching element,

and wherein signal wires are attached at first ends of the signal wires to the package lead and at second ends of the signal wires to first bond pads of the series of bond pads, and the ground wires are attached at first ends of the ground wires to the ground connection region and at second ends to second bond pads of the series of bond pads, wherein the first bond pads and the second bond pads are different from each other.

2. The wirebond array of claim 1 , wherein the first bond pads and the second bond pads are proximate to an edge of a semiconductor device.

3. The wirebond array of claim 2 , wherein the semiconductor device is a power device.

4. The apparatus of claim 1 , wherein the wrap-around metallization formed on the face of the isolator includes a refractory tungsten plated with Ni and Au.

5. The apparatus of claim 1 , wherein the isolator comprises a ceramic window frame.

6. The apparatus of claim 1 , wherein the apparatus further includes at least 10 signal wires and at least 10 ground wires, and the signal wires and ground wires are interdigitated in an alternating configuration.

7. A microwave power device comprising:

a package having a lead, a ground plane, and a ground connection region substantially coplanar with the lead;

a power transistor mounted over a first portion of the ground plane;

an isolator over a second portion of the ground plane, wherein the isolator has a top surface, a face extending perpendicular from the ground plane to the top surface, and an edge between the top surface and the face, and wherein the lead and the ground connection region are coupled to the top surface of the isolator;

a connector connecting the ground connection region to the ground plane, wherein the connector includes wrap-around metallization formed on the face of the isolator; and

a wirebond array comprising a plurality of signal wires and a plurality of ground wires interdigitated with and substantially parallel to the plurality of signal wires, wherein the plurality of signal wires and the plurality of ground wires have substantially the same loop heights so that the wirebond array operates as an impedance matching element, and wherein each of the plurality of ground wires is attached at a first end of the ground wire to the ground connection region and at a second end of the ground wire to a first bond area proximate to an edge of the power transistor, and wherein each of the plurality of signal wires is attached at a first end of the signal wire to the lead and at a second end of the signal wire to a second bond area proximate to the edge of the power transistor.

8. The power device of claim 7 , wherein the package is an air-cavity package.

9. The power device of claim 7 , wherein the lead and ground connection region are mechanically coupled to the isolator so that the lead and the ground connection region are close together and are substantially coplanar with each other, and so that the lead and the ground connection region are raised above the ground plane.

10. The power device of claim 7 , wherein the connector is provided on the isolator.

11. The power device of claim 7 wherein a distance between the interdigitated source and ground wires is between 50 and 500 μm.

12. The power device of claim 7 , wherein the wirebond array includes from 10-20 signal wires and 10-20 ground wires.

13. The power device of claim 7 , wherein the signal wires carry a signal having a frequency greater than 2.0 GHz.

14. The power device of claim 7 , wherein the ground plane is connected to an external ground node.

15. The power device of claim 7 , wherein the ground wires and the signal wires have substantially the same shape.

Assignments (30)
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 11759915 AND REPLACE IT WITH APPLICATION 11759935 PREVIOUSLY RECORDED ON REEL 040925 FRAME 0001. ASSIGNOR(S) HEREBY CONFIRMS THE RELEASE OF SECURITY INTEREST. Recorded Feb 17, 2020
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP, B.V. F/K/A FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 052917/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 11759915 AND REPLACE IT WITH APPLICATION 11759935 PREVIOUSLY RECORDED ON REEL 040928 FRAME 0001. ASSIGNOR(S) HEREBY CONFIRMS THE RELEASE OF SECURITY INTEREST. Recorded Jan 17, 2020
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP B.V.
Reel/Frame 052915/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 11759915 AND REPLACE IT WITH APPLICATION 11759935 PREVIOUSLY RECORDED ON REEL 037486 FRAME 0517. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS. Recorded Dec 10, 2019
From: CITIBANK, N.A.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 053547/0421 →
RELEASE OF SECURITY INTEREST Recorded Sep 10, 2019
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP B.V.
Reel/Frame 050744/0097 →
CORRECTIVE ASSIGNMENT TO CORRECT THE TO CORRECT THE APPLICATION NO. FROM 13,883,290 TO 13,833,290 PREVIOUSLY RECORDED ON REEL 041703 FRAME 0536. ASSIGNOR(S) HEREBY CONFIRMS THE THE ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS.. Recorded Feb 20, 2019
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: SHENZHEN XINGUODU TECHNOLOGY CO., LTD.
Reel/Frame 048734/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE PATENTS 8108266 AND 8062324 AND REPLACE THEM WITH 6108266 AND 8060324 PREVIOUSLY RECORDED ON REEL 037518 FRAME 0292. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS. Recorded Feb 1, 2017
From: CITIBANK, N.A.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 041703/0536 →
CORRECTIVE ASSIGNMENT TO CORRECT THE NATURE OF CONVEYANCE LISTED CHANGE OF NAME SHOULD BE MERGER AND CHANGE PREVIOUSLY RECORDED AT REEL: 040652 FRAME: 0180. ASSIGNOR(S) HEREBY CONFIRMS THE MERGER AND CHANGE OF NAME. Recorded Jan 12, 2017
From: FREESCALE SEMICONDUCTOR INC.
To: NXP USA, INC.
Reel/Frame 041354/0148 →
CHANGE OF NAME Recorded Nov 8, 2016
From: FREESCALE SEMICONDUCTOR INC.
To: NXP USA, INC.
Reel/Frame 040652/0180 →
RELEASE OF SECURITY INTEREST Recorded Nov 7, 2016
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP B.V.
Reel/Frame 040928/0001 →
RELEASE OF SECURITY INTEREST Recorded Sep 21, 2016
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP, B.V., F/K/A FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 040925/0001 →
SUPPLEMENT TO THE SECURITY AGREEMENT Recorded Jun 16, 2016
From: FREESCALE SEMICONDUCTOR, INC.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 039138/0001 →
ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS Recorded Jan 13, 2016
From: CITIBANK, N.A.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 037518/0292 →
ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS Recorded Jan 12, 2016
From: CITIBANK, N.A.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 037486/0517 →
PATENT RELEASE Recorded Dec 21, 2015
From: CITIBANK, N.A., AS COLLATERAL AGENT
To: FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 037354/0225 →
PATENT RELEASE Recorded Dec 21, 2015
From: CITIBANK, N.A., AS COLLATERAL AGENT
To: FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 037357/0120 →
PATENT RELEASE Recorded Dec 21, 2015
From: CITIBANK, N.A., AS COLLATERAL AGENT
To: FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 037356/0866 →
PATENT RELEASE Recorded Dec 21, 2015
From: CITIBANK, N.A., AS COLLATERAL AGENT
To: FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 037356/0027 →
PATENT RELEASE Recorded Dec 21, 2015
From: CITIBANK, N.A., AS COLLATERAL AGENT
To: FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 037356/0553 →
PATENT RELEASE Recorded Dec 21, 2015
From: CITIBANK, N.A., AS COLLATERAL AGENT
To: FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 037356/0143 →
PATENT RELEASE Recorded Dec 21, 2015
From: CITIBANK, N.A., AS COLLATERAL AGENT
To: FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 037357/0194 →
SECURITY AGREEMENT Recorded Nov 6, 2013
From: FREESCALE SEMICONDUCTOR, INC.
To: CITIBANK, N.A., AS NOTES COLLATERAL AGENT
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SECURITY AGREEMENT Recorded Jun 18, 2013
From: FREESCALE SEMICONDUCTOR, INC.
To: CITIBANK, N.A., AS NOTES COLLATERAL AGENT
Reel/Frame 030633/0424 →
SECURITY AGREEMENT Recorded Sep 3, 2010
From: FREESCALE SEMICONDUCTOR, INC.
To: CITIBANK, N.A., AS COLLATERAL AGENT
Reel/Frame 024933/0340 →
SECURITY AGREEMENT Recorded Sep 3, 2010
From: FREESCALE SEMICONDUCTOR, INC.
To: CITIBANK, N.A., AS NOTES COLLATERAL AGENT
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SECURITY AGREEMENT Recorded Sep 1, 2010
From: FREESCALE SEMICONDUCTOR, INC.
To: CITIBANK, N.A., AS NOTES COLLATERAL AGENT
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SECURITY AGREEMENT Recorded Sep 1, 2010
From: FREESCALE SEMICONDUCTOR, INC.
To: CITIBANK, N.A., AS COLLATERAL AGENT
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SECURITY AGREEMENT Recorded May 13, 2010
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SECURITY AGREEMENT Recorded Mar 15, 2010
From: FREESCALE SEMICONDUCTOR, INC.
To: CITIBANK, N.A.
Reel/Frame 024085/0001 →
SECURITY AGREEMENT Recorded Feb 2, 2007
From: FREESCALE SEMICONDUCTOR, INC.; FREESCALE ACQUISITION CORPORATION; FREESCALE ACQUISITION HOLDINGS CORP.; FREESCALE HOLDINGS (BERMUDA) III, LTD.
To: CITIBANK, N.A. AS COLLATERAL AGENT
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ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 29, 2006
From: BOKATIUS, MARIO M.; AAEN, PETER H.; CONDIE, BRIAN W.
To: FREESCALE SEMICONDUCTOR, INC.
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