Integrated electronic device having a low voltage electric supply
View Patent ↗An integrated electronic device includes at least one supply pin and at least one booster coupled to said at least one supply pin. Moreover, there is at least one integrated circuit powered by the at least one booster and associated therewith in a “system in a package configuration.”
1. A packaged device comprising:
a package;
at least one integrated circuit booster die within said package; and
at least one integrated circuit memory die within said package powered by said booster die, said memory and booster dice being stacked within said package;
said package including a first pin to be coupled to a voltage below that needed by memory die, said first pin connected to said memory die through said booster; and
said package including memory package pins so that package can be used in a memory application.
2. A device according to claim 1 , further comprising a plurality of discrete components; and wherein said memory die coupled to said booster die by said plurality of discrete components.
3. A device according to claim 2 , wherein said plurality of discrete components comprises at least one voltage divider coupled between an input and an output of said booster die.
4. A device according to claim 2 , wherein said plurality of discrete components comprises at least one capacitive component coupled between an output and an input of said booster die.
5. A device according to claim 2 , wherein the plurality of discrete components comprises at least one inductive component coupled between a supply pin and an input of said booster die.
6. A device according to claim 1 , further comprising a plurality of discrete components to couple said at least one booster die to supply pins.
7. A device according to claim 1 , said memory die having a core; and wherein an output of said booster die is connected to the core of said memory.
8. A device according to claim 1 , wherein said at least one booster die comprises a plurality of boosters coupled in series.
9. A method comprising:
coupling an integrated booster die to at least one supply pin;
coupling an integrated memory die to the at least one booster die;
associating the booster die and memory die together in a stacked die package having memory package pins and conforming to the size of a conventional memory package;
powering said memory die, with a voltage below a voltage needed by the memory die, using said booster die; and
connecting said die package to a system using the memory package pins on the package such that said package can be plugged in the same way as a conventional memory package using a supply voltage lower than that used by conventional memory packages.
10. The method of claim 9 , wherein the memory die comprises a core coupled to the booster die by a plurality of discrete components.
11. The method of claim 9 , wherein the booster die comprises a plurality of boosters coupled in series.