Programmable structured arrays
View Patent ↗A programmable semiconductor device, wherein: a user programmable switch comprising a configurable element is positioned above a transistor gate material layer deposited on a silicon substrate layer.
1. A programmable wire structure for an integrated circuit, comprising:
a programmable switch coupling two nodes, said switch having a first state that connects said two nodes, and said switch having a second state that disconnects said two nodes; and
a configuration circuit coupled to said programmable switch, said circuit comprising a means to program said switch between said first and second state; and
a transistor gate material layer deposited on a silicon substrate layer, said switch and said configuration circuit fabricated substantially above said transistor gate material layer.
2. The structure of claim 1 , further comprising a first metal layer deposited substantially above said transistor gate material layer, wherein a first metal line is coupled to said switch or configuration circuit or both.
3. The structure of claim 2 , further comprising a second metal layer deposited substantially above said first metal layer, wherein a second metal line is coupled to said switch or configuration circuit or both.
4. The structure of claim 1 , wherein said programmable switch comprises a thin film pass-gate transistor.
5. The structure of claim 4 , wherein the thin film pass-gate transistor is controlled by a configuration circuit comprising a configurable memory element.
6. The structure of claim 5 , wherein said configurable memory element comprises one of volatile or non volatile memory elements.
7. The structure of claim 5 , wherein the programmable means further comprises:
a decoded access to an individual memory element in an array of memory elements; and
a program method to alter the memory element polarity, whereby generating an on and off control signal coupling to said pass-gate transistor, wherein:
said first state is generated by an on pass-gate; and
said second state is generated by an off pass-gate.
8. The structure of claim 5 , wherein said configuration circuit comprises a transistor.
9. The structure of claim 1 , wherein said programmable switch comprises a configurable element.
10. The structure of claim 9 , wherein said configurable element comprises one of resistor, anti-fuse, capacitor, laser-fuse, electrical-fuse, diode, junction, SRAM cell, DRAM cell, metal, optional link, floating gate, EPROM cell, EEPROM cell, flash cell, ferro-electric element, photo-electric element, optical element, electro-chemical element, electrolytic element, Carbon nano-tube, electro-mechanical element, electro-magnetic element and magnetic element.
11. The structure of claim 9 , wherein the programmable means further comprises:
a decoded access to an individual switch in an array of switches; and
a program method to alter the switch conductivity between conductive and non conductive levels, wherein:
said first state is generated by the conductive switch; and
said second state is generated by the non conductive switch.
12. A programmable wire structure for an integrated circuit, comprising:
a programmable switch coupling two nodes, said switch comprised of:
a configurable element, the element further comprising:
a first state that connects said two nodes; and
a second state that disconnects said two nodes; and
a programmable means to configure the configurable element between said first and second states; and
a transistor gate material layer deposited on a silicon substrate layer, said switch fabricated substantially above said transistor gate material layer.
13. The structure of claim 12 , further comprising a first metal layer deposited substantially above said transistor gate material layer, wherein a first metal line is coupled to said switch.
14. The structure of claim 13 , further comprising a second metal layer deposited substantially above said first metal layer, wherein a second metal line is coupled to said switch.
15. The structure of claim 12 , wherein said configurable element comprises one of resistor, anti-fuse, capacitor, laser-fuse, electrical-fuse, diode, junction, SRAM cell, DRAM cell, metal, optional link, floating gate, EPROM cell, EEPROM cell, flash cell, ferro-electric element, photo-electric element, optical element, electro-chemical element, electrolytic element, Carbon nano-tube, electro-mechanical element, electro-magnetic element and magnetic element.
16. The structure of claim 12 , wherein said programmable switch comprises a pass-gate transistor.
17. The structure of claim 16 , wherein the pass-gate transistor is controlled by a configuration circuit comprising the configurable element.
18. The structure of claim 12 , wherein the programmable means further comprises: accessing an individual configurable element in an array of configurable elements; and programming the configurable element to achieve either the first or the second state.
19. A programmable semiconductor device, wherein:
a user programmable switch comprising a configurable element and a device to configure the element are positioned above a transistor gate material layer deposited on a silicon substrate layer.
20. The device in claim 19 , wherein the configurable element comprises one of resistor, anti-fuse, capacitor, laser-fuse, electrical-fuse, diode, junction, SRAM cell, DRAM cell, metal, optional link, floating gate, EPROM cell, EEPROM cell, flash cell, ferro-electric element, photo-electric element, optical element, electro-chemical element, electrolytic element, Carbon nano-tube, electro-mechanical element, electro-magnetic element and magnetic element.