IP Library Granted Patent US 7,361,284
Granted Patent B2
US 7,361,284 · App. 11/426,013 · Granted Apr 22, 2008

Method for wafer-level package

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Quick Facts
Patent No.
US 7,361,284
App. No.
11/426,013
Granted
Apr 22, 2008
Kind
B2
Abstract

A method for wafer-level package. A cap wafer having cavities is bonded to a support wafer, and a portion of the cap wafer is etched through. The cap wafer is released from the support wafer, and bonded to a transparent wafer, and a portion of the cap wafer corresponding to the cavities is removed so that the remaining cap wafer forms a plurality of support blocks. A device wafer is provided, and the support blocks are bonded to the device wafer so that the support blocks and the transparent wafer hermitically seal the devices disposed in the device wafer.

Claims (27)

1. A method for wafer-level package, comprising:

providing a cap wafer;

forming a plurality of cavities in a first surface of the cap wafer;

bonding the first surface of the cap wafer to a support wafer;

etching through a portion of the cap wafer surrounding the cavities from a second surface of the cap wafer;

removing the cap wafer from the support wafer, and bonding the first surface of the cap wafer to a transparent wafer;

removing a portion of the cap wafer corresponding to the cavities from the second surface of the cap wafer so that the remaining cap wafer form a plurality of support blocks;

providing a device wafer comprising a plurality of devices and a plurality of contact pads; and

bonding the support blocks to the device wafer so that the support blocks and the transparent wafer hermitically seal the devices.

2. The method of claim 1 , further comprising removing the transparent wafer corresponding to the contact pads to expose the contact pads subsequent to bonding the support blocks and the device wafer.

3. The method of claim 2 , further comprising performing a wafer-level testing via the contact pads.

4. The method of claim 2 , further comprising performing a singulation process to form a plurality of packaged device structures subsequent to exposing the contact pads.

5. The method of claim 4 , wherein the singulation process comprises:

providing a frame comprising an extendable film mounted thereon;

bonding the device wafer to the extendable film;

performing a cutting process to dice the device wafer along scribe lines of the device wafer; and

performing an automatic wafer expansion and sorting process.

6. The method of claim 1 , wherein the cap wafer comprises a semiconductor wafer.

7. The method of claim 1 , wherein the cavities are formed by etching.

8. The method of claim 1 , wherein the support wafer comprises a glass wafer, a quartz wafer, a plastic wafer, or a semiconductor wafer.

9. The method of claim 1 , wherein the cap wafer is bonded to the support wafer with a bonding layer.

10. The method of claim 1 , further comprising performing a thinning process on the cap wafer subsequent to bonding the first surface of the cap wafer to the support wafer.

11. The method of claim 1 , wherein the transparent wafer comprises a glass wafer, a quartz wafer, or a plastic wafer.

12. The method of claim 1 , wherein the cap wafer and the transparent wafer are bonded together by anodic bonding or fusion bonding.

13. The method of claim 1 , wherein each support block has an L-shaped structure.

14. The method of claim 1 , wherein the support blocks and the device wafer are bonded together by eutectic bonding or glass frit bonding.

15. The method of claim 1 , wherein the devices comprise optical devices, MEMS devices, or semiconductor devices.

Assignments (7)
CHANGE OF NAME Recorded Nov 19, 2025
From: TESSERA ADVANCED TECHNOLOGIES, INC.
To: ADEIA SEMICONDUCTOR ADVANCED TECHNOLOGIES INC.
Reel/Frame 073635/0304 →
SECURITY INTEREST Recorded Jun 1, 2020
From: ROVI SOLUTIONS CORPORATION; ROVI TECHNOLOGIES CORPORATION; ROVI GUIDES, INC.; TIVO SOLUTIONS INC.; VEVEO, INC.; INVENSAS CORPORATION; INVENSAS BONDING TECHNOLOGIES, INC.; TESSERA, INC.; TESSERA ADVANCED TECHNOLOGIES, INC.; DTS, INC.; PHORUS, INC.; IBIQUITY DIGITAL CORPORATION
To: BANK OF AMERICA, N.A.
Reel/Frame 053468/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 14, 2017
From: GREDMANN TAIWAN LTD.
To: TESSERA ADVANCED TECHNOLOGIES, INC.
Reel/Frame 044442/0960 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 2, 2014
From: TOUCH MICRO-SYSTEM TECHNOLOGY CORP.
To: GREDMANN TAIWAN LTD.
Reel/Frame 033009/0642 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 28, 2014
From: TOUCH MICRO-SYSTEM TECHNOLOGY CORP.
To: GREDMAN TAIWAN LTD.
Reel/Frame 032978/0275 →
CHANGE OF THE ADDRESS OF THE ASSIGNEE Recorded Mar 4, 2008
From: TOUCH MICRO-SYSTEM TECHNOLOGY INC.
To: TOUCH MICRO-SYSTEM TECHNOLOGY INC.
Reel/Frame 020592/0258 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 23, 2006
From: CHEN, CHIH-HSIEN
To: TOUCH MICRO-SYSTEM TECHNOLOGY INC.
Reel/Frame 017831/0289 →