Method for improving the precision of a temperature-sensor circuit
View Patent ↗The preferred embodiments described below provide a method and memory device for improving the precision of a temperature-sensor circuit. In one preferred embodiment, first and second temperature-dependent reference voltages are generated and compared, and an operating condition of the memory array is controlled based on the result of the comparison. Instead of using a temperature-dependent reference voltage, a temperature-dependent reference current can be used. Other embodiments are disclosed, and each of the embodiments can be used alone or together in combination.
1. A method for controlling an operating condition of a memory array based on temperature, the method comprising:
(a) generating a first temperature-dependent reference voltage comprising a negative temperature coefficient;
(b) generating a second temperature-dependent reference voltage comprising a positive temperature coefficient;
(c) comparing the first temperature-dependent reference voltage with the second temperature-dependent reference voltage; and
(d) controlling an operating condition of a memory array based on a result of the comparison of the first and second temperature-dependent reference voltages.
2. The method of claim 1 further comprising:
generating a third temperature-dependent reference voltage comprising a positive temperature coefficient; and
comparing the first temperature-dependent reference voltage with the third temperature-dependent reference voltage;
wherein (d) comprises controlling an operating condition of the memory array based on the comparison of the first and second temperature-dependent reference voltages and the comparison of the first and third temperature-dependent reference voltages.
3. The method of claim 1 , wherein (d) comprises controlling a programming bandwidth of the memory array based on a result of the comparison of the first and second temperature-dependent reference voltages.
4. The method of claim 3 , wherein (d) comprises reducing programming bandwidth of the memory array if the second temperature-dependent reference voltage is greater than the first temperature-dependent reference voltage.
5. The method of claim 1 , wherein (d) comprises controlling a read bandwidth of the memory array based on a result of the comparison of the first and second temperature-dependent reference voltages.
6. The method of claim 1 , wherein (d) comprises controlling a voltage across a memory cell for read based on a result of the comparison of the first and second temperature-dependent reference voltages.
7. The method of claim 1 , wherein (d) comprises controlling a voltage across a memory cell for write based on a result of the comparison of the first and second temperature-dependent reference voltages.
8. The method of claim 1 , wherein (d) comprises controlling a sensing current for read based on a result of the comparison of the first and second temperature-dependent reference voltages.
9. The method of claim 1 , wherein (d) comprises controlling a sensing time for read based on a result of the comparison of the first and second temperature-dependent reference voltages.
10. A method for controlling an operating condition of a memory array based on temperature, the method comprising:
(a) generating a first temperature-dependent reference current comprising a negative temperature coefficient;
(b) generating a second temperature-dependent reference current comprising a positive temperature coefficient;
(c) comparing the first temperature-dependent reference current with the second temperature-dependent reference current; and
(d) controlling an operating condition of a memory array based on a result of the comparison of the first and second temperature-dependent reference currents.
11. The method of claim 10 , wherein (d) comprises controlling a programming bandwidth of the memory array based on a result of the comparison of the first and second temperature-dependent reference currents.
12. The method of claim 11 , wherein (d) comprises controlling a read bandwidth of the memory array based on a result of the comparison of the first and second temperature-dependent reference currents.
13. The method of claim 10 , wherein (d) comprises controlling a voltage across a memory cell for read based on a result of the comparison of the first and second temperature-dependent reference currents.
14. The method of claim 10 , wherein (d) comprises controlling a voltage across a memory cell for write based on a result of the comparison of the first and second temperature-dependent reference currents.
15. The method of claim 10 , wherein (d) comprises controlling a sensing current for read based on a result of the comparison of the first and second temperature-dependent reference currents.
16. The method of claim 10 , wherein (d) comprises controlling a sensing time for read based on a result of the comparison of the first and second temperature-dependent reference currents.