IP Library Granted Patent US 7,719,116
Granted Patent B2
US 7,719,116 · App. 11/443,858 · Granted May 18, 2010

Semiconductor device having reduced number of external pad portions

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Quick Facts
Patent No.
US 7,719,116
App. No.
11/443,858
Granted
May 18, 2010
Kind
B2
Abstract

A semiconductor device includes a semiconductor substrate having an integrated circuit, a first insulating film formed on the semiconductor substrate, at least one power source internal wiring line formed on the first insulating film, and a second insulating film formed on the first insulating film and on the internal wiring line and having a plurality of openings exposing parts of the internal wiring line. At least one wiring line is formed on an upper side of the second insulating film to correspond to the internal wiring line and electrically connected to the internal wiring line via the plurality of openings of the second insulating film. The wiring line has at least one external electrode pad portion whose number is smaller than the number of openings in the second insulating film.

Claims (40)

1. A semiconductor device comprising:

a semiconductor substrate having an integrated circuit which includes a plurality of internal connection pads;

a first insulating film formed on the semiconductor substrate and having a plurality of first openings each of which corresponds to one of the internal connection pads, respectively;

at least one power source internal wiring line formed on the first insulating film and connected to the internal connection pads via the first openings;

a second insulating film formed on the first insulating film and on the internal wiring line and having a plurality of second openings exposing parts of the internal wiring line, the number of the second openings in the second insulating film being larger than the number of the first openings in the first insulating film; and

a plurality of wiring lines which are formed on an upper side of the second insulating film to correspond to the internal wiring line and which are electrically connected to the internal wiring line via the plurality of second openings of the second insulating film, each of the wiring lines having a thickness in a vertical direction that is thicker than a thickness in the vertical direction of the internal wiring line and a length in a first horizontal direction that is shorter than a length in the first horizontal direction of the internal wiring line;

wherein each of the wiring lines has at least one external electrode pad portion whose number is smaller than a number of second openings in the second insulating film; and

wherein a solder ball is provided on the at least one external electrode pad portion of each of the wiring lines.

2. The semiconductor device according to claim 1 , further comprising connection pads provided in the second openings of the second insulating film covering an upper surface of the internal wiring line and a periphery of the second openings on the second insulating film.

3. The semiconductor device according to claim 2 , wherein the wiring lines are formed in contact with the connection pads.

4. The semiconductor device according to claim 3 , wherein the second insulating film includes a first layer formed between the connection pads, and a second layer provided on the first layer and having third openings formed at positions corresponding to the connection pads.

5. The semiconductor device according to claim 4 , wherein the second layer has a layer structure having a plurality of layers.

6. The semiconductor device according to claim 1 , wherein the wiring lines and the internal wiring line are made of copper.

7. The semiconductor device according to claim 1 , wherein the elasticity modulus of at least one of the first and second insulating films is 5 GPa or less.

8. The semiconductor device according to claim 1 , wherein the wiring lines and the internal wiring line have a same width in a second horizontal direction that is perpendicular to the first horizontal direction.

9. The semiconductor device according to claim 1 , wherein the plurality of wiring lines are arranged along the internal wiring line in the first horizontal direction.

10. The semiconductor device according to claim 9 , wherein Ni/(To/Ti)≦No≦Ni((To/Ti)−1) is satisfied, where Ni is the number of the second openings, No is the number of external electrode pad portions provided in the wiring lines, Ti is the thickness of the internal wiring line, and To is the thickness of the wiring lines.

11. The semiconductor device according to claim 1 , wherein the first insulating film is made of low-k.

12. The semiconductor device according to claim 1 , wherein the second insulating film includes low-k.

13. The semiconductor device according to claim 2 , wherein each of the connection pads is independently formed so as not to be electrically connected to each other.

14. The semiconductor device according to claim 4 , wherein:

the second insulating film includes a third layer formed on the second layer;

the third layer has a fourth opening; and

electrical conductors are formed in the third openings and the fourth openings so as not to be electrically connected at a boundary between the second layer and the third layer.

15. A mounting structure comprising:

a semiconductor device which includes: (i) a semiconductor substrate having an integrated circuit which includes a plurality of internal connection pads; (ii) a first insulating film formed on the semiconductor substrate and having a plurality of first openings each of which corresponds to one of the internal connection pads, respectively; (iii) at least one power source internal wiring line formed on the first insulating film and connected to the internal connection pads via the first openings; (iv) a second insulating film formed on the first insulating film and on the internal wiring line and having a plurality of second openings exposing parts of the internal wiring line, the number of the second openings in the second insulating film being larger than the number of the first openings in the first insulating film; and (v) a plurality of wiring lines which are formed on an upper side of the second insulating film to correspond to the internal wiring line and which are electrically connected to the internal wiring line via the plurality of second openings of the second insulating film, each of the wiring lines having a thickness in a vertical direction that is thicker than a thickness in the vertical direction of the internal wiring line and a length in a horizontal direction that is shorter than a length in the horizontal direction of the internal wiring line; and wherein each of the wiring lines has at least one external electrode pad portion whose number is smaller than a number of the second openings formed in the second insulating film;

a substrate having a power source pattern with at least one power source terminal portion corresponding to the at least one external electrode pad portion of each of the wiring lines; and

a solder layer bonding the at least one external electrode pad portion to the power source terminal portion of the power source pattern.

16. The mounting structure according to claim 15 , wherein the plurality of wiring lines are arranged along the internal wiring line in the horizontal direction.

17. The mounting structure according to claim 16 , wherein Ni/(To/Ti)≦No≦Ni((To/Ti)−1) is satisfied, where Ni is the number of the second openings, No is the number of external electrode pad portions provided in the wiring lines, Ti is the thickness of the internal wiring line, and To is the thickness of the wiring lines.

18. The mounting structure according to claim 15 , wherein a columnar electrode is formed on the at least one external electrode pad portion of each of the wiring lines.

19. The mounting structure according to claim 18 , wherein a sealing film is provided around the columnar electrode, on the second insulating film.

20. A semiconductor device comprising:

a semiconductor substrate having an integrated circuit which includes a plurality of internal connection pads;

a first insulating film formed on the semiconductor substrate and having a plurality of first openings each of which corresponds to one of the internal connection pads, respectively;

at least one power source internal wiring line formed on the first insulating film and connected to the internal connection pads via the first openings;

a second insulating film formed on the first insulating film and on the internal wiring line and having a plurality of second openings exposing parts of the internal wiring line, the number of the second openings in the second insulating film being larger than the number of the first openings in the first insulating film; and

a plurality of wiring lines which are formed on an upper side of the second insulating film to correspond to the internal wiring line and which are electrically connected to the internal wiring line via the plurality of second openings of the second insulating film, each of the wiring lines having a thickness in a vertical direction that is thicker than a thickness in the vertical direction of the internal wiring line and a length in a horizontal direction that is shorter than a length in the horizontal direction of the internal wiring line;

wherein each of the wiring lines has at least one external electrode pad portion whose number is smaller than a number of second openings in the second insulating film; and

wherein a columnar electrode is provided on the at least one external electrode pad portion of each of the wiring lines, and a solder ball is provided on the columnar electrode.

Assignments (5)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 27, 2017
From: TERA PROBE, INC.
To: AOI ELECTRONICS CO., LTD.
Reel/Frame 041521/0001 →
MERGER Recorded Jan 27, 2017
From: TERAMIKROS, INC.
To: TERA PROBE, INC.
Reel/Frame 041664/0471 →
CHANGE OF OWNERSHIP BY CORPORATE SEPARATION-TO CORRECT ASSIGNEE'S ADDRESS ON REEL 027465, FRAME 0812 Recorded Jan 6, 2012
From: CASIO COMPUTER CO., LTD.
To: TERAMIKROS, INC.
Reel/Frame 027492/0449 →
CHANGE OF OWNERSHIP BY CORPORATE SEPARATION Recorded Jan 3, 2012
From: CASIO COMPUTER CO., LTD.
To: TERAMIKROS, INC.
Reel/Frame 027465/0812 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 31, 2006
From: WAKABAYASHI, TAKESHI; MIHARA, ICHIRO
To: CASIO COMPUTER CO., LTD.
Reel/Frame 017938/0493 →