IP Library Granted Patent US 8,548,400
Granted Patent B2
US 8,548,400 · App. 11/445,981 · Granted Oct 1, 2013

System and method for polar modulation using power amplifier bias control

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Quick Facts
Patent No.
US 8,548,400
App. No.
11/445,981
Granted
Oct 1, 2013
Kind
B2
Abstract

Systems and techniques are described for applying a polar bias modulation having a phase component and an amplitude component to a signal amplified by a power amplifier. The power amplifier (PA) has a plurality of amplifier gain stages and is configured to amplify an input to create an amplifier output signal. The input to the power amplitude is phase modulated based upon the phase component of the polar bias modulation, but need not be amplitude modulated. Amplitude modulation is provided by logic that includes a detector configured to receive an indication of the amplifier output as a feedback signal, a control module configured to generate a control signal based upon both the feedback signal and the amplitude component of the polar bias modulation, and a bias circuit configured to adjust a bias signal associated with at least one of the plurality of amplifier gain stages in response to the control signal. Such a modulation scheme may be readily applied in enhanced data rate for global service mode (GSM) evolution (EDGE) applications, as well as in other environments that make use of polar modulation.

Claims (30)

1. A system for applying a polar bias modulation having a phase component and an amplitude component to a signal, the system comprising:

a power amplifier (PA) having a plurality of amplifier gain stages, wherein the power amplifier is configured to amplify an input to create an amplifier output signal;

a frequency synthesizer configured to apply an open loop phase modulation to the signal input to the power amplifier, wherein the phase modulation is based upon the phase component of the polar bias modulation; and

a closed loop amplitude control circuit comprising a detector configured to receive an indication of the amplifier output as a feedback signal, a control module configured to generate a control signal based upon both the feedback signal and the amplitude component of the polar bias modulation, and a bias circuit configured to adjust a bias signal associated with at least one of the plurality of amplifier gain stages in response to the control signal.

2. The system of claim 1 wherein the signal input to the power amplifier comprises a substantially uniform amplitude.

3. The system of claim 1 further comprising a baseband gain stage coupled to the detector and the control module and configured to adjust the feedback signal.

4. The system of claim 3 wherein the baseband gain stage is configured to adjust the feedback signal based at least in part upon a signal received from a control interface.

5. The system of claim 3 wherein the baseband gain stage is configured to adjust the feedback signal in discrete steps.

6. The system of claim 1 wherein the control module comprises an integrator having a time constant, wherein the integrator is configured to combine the feedback signal and the amplitude component of the polar modulation to create the control signal.

7. The system of claim 6 wherein the time constant of the integrator is adjustable to maintain a substantially constant loop gain of the feedback signal.

8. The system of claim 5 wherein the control module comprises an integrator having a time constant, wherein the integrator is configured to combine the feedback signal and the amplitude component of the polar modulation to create the control signal, and wherein the time constant of the integrator is adjustable with the discrete steps of the baseband gain to maintain a substantially constant loop gain of the feedback signal.

9. The system of claim 1 wherein the plurality of amplifier gain stages comprises a first amplifier gain stage, wherein the bias signal associated with the first stage is a collector voltage.

10. The system of claim 9 wherein the plurality of amplifier gain stages further comprises a second amplifier gain stage, wherein the bias signal associated with the second amplifier gain stage is a base current.

11. The system of claim 10 wherein the bias circuit comprises a voltage-to-current conversion module configured to convert the control signal to the base current of the second amplifier gain stage.

12. The system of claim 1 further comprising an analog-to-digital converter coupled to receive the feedback signal and a digital-to-analog converter configured to provide the control signal to the bias circuit, and wherein the control module comprises digital circuitry logically disposed between the analog-to-digital converter and the digital-to-analog converter.

13. The system of claim 1 wherein the control module comprises an analog integrator and associated bias circuitry.

14. A wireless telephone handset incorporating the system of claim 1 .

15. A method of applying a polar modulation having a phase component and an amplitude component to a power amplifier (PA) having an amplifier gain stage, wherein the power amplifier is configured to amplify an input to create an amplifier output signal, the method comprising the steps of:

applying an open loop phase modulation to the signal input to the power amplifier, wherein the open loop phase modulation is based upon the phase component of the polar bias modulation;

receiving an indication of the amplifier output amplitude as a feedback signal;

generating a control signal based upon both the feedback signal and the amplitude component of the polar bias modulation; and

adjusting a bias signal associated with the amplifier gain stage in response to the control signal.

16. The method of claim 15 further comprising the step of adjusting the feedback signal in discrete steps between the receiving step and the generating step.

17. The method of claim 15 wherein the generating step comprises combining the feedback signal and the amplitude component of the polar modulation at an integrator to create the control signal, and wherein the time constant of the integrator is adjustable with the discrete steps of the baseband gain to maintain a substantially constant loop gain of the feedback signal.

18. A circuit configured to execute the method of claim 15 .

19. A system for applying a polar modulation having a phase component and an amplitude component to a power amplifier (PA) having an amplifier gain stage, wherein the power amplifier is configured to amplify an input to create an amplifier output signal, the system comprising:

open control loop means for providing the phase component of the polar modulation to the power amplifier;

means for receiving an indication of an amplifier output amplitude as a feedback signal;

means for generating a control signal based upon both the feedback signal and the amplitude component of the polar bias modulation; and

means for adjusting a bias signal associated with the amplifier gain stage in response to the control signal.

Assignments (22)
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 11759915 AND REPLACE IT WITH APPLICATION 11759935 PREVIOUSLY RECORDED ON REEL 040925 FRAME 0001. ASSIGNOR(S) HEREBY CONFIRMS THE RELEASE OF SECURITY INTEREST. Recorded Feb 17, 2020
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP, B.V. F/K/A FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 052917/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 11759915 AND REPLACE IT WITH APPLICATION 11759935 PREVIOUSLY RECORDED ON REEL 040928 FRAME 0001. ASSIGNOR(S) HEREBY CONFIRMS THE RELEASE OF SECURITY INTEREST. Recorded Jan 17, 2020
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP B.V.
Reel/Frame 052915/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 11759915 AND REPLACE IT WITH APPLICATION 11759935 PREVIOUSLY RECORDED ON REEL 037486 FRAME 0517. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS. Recorded Dec 10, 2019
From: CITIBANK, N.A.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 053547/0421 →
RELEASE OF SECURITY INTEREST Recorded Sep 10, 2019
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP B.V.
Reel/Frame 050744/0097 →
CORRECTIVE ASSIGNMENT TO CORRECT THE TO CORRECT THE APPLICATION NO. FROM 13,883,290 TO 13,833,290 PREVIOUSLY RECORDED ON REEL 041703 FRAME 0536. ASSIGNOR(S) HEREBY CONFIRMS THE THE ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS.. Recorded Feb 20, 2019
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: SHENZHEN XINGUODU TECHNOLOGY CO., LTD.
Reel/Frame 048734/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE PATENTS 8108266 AND 8062324 AND REPLACE THEM WITH 6108266 AND 8060324 PREVIOUSLY RECORDED ON REEL 037518 FRAME 0292. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS. Recorded Feb 1, 2017
From: CITIBANK, N.A.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 041703/0536 →
CORRECTIVE ASSIGNMENT TO CORRECT THE NATURE OF CONVEYANCE LISTED CHANGE OF NAME SHOULD BE MERGER AND CHANGE PREVIOUSLY RECORDED AT REEL: 040652 FRAME: 0180. ASSIGNOR(S) HEREBY CONFIRMS THE MERGER AND CHANGE OF NAME. Recorded Jan 12, 2017
From: FREESCALE SEMICONDUCTOR INC.
To: NXP USA, INC.
Reel/Frame 041354/0148 →
CHANGE OF NAME Recorded Nov 8, 2016
From: FREESCALE SEMICONDUCTOR INC.
To: NXP USA, INC.
Reel/Frame 040652/0180 →
RELEASE OF SECURITY INTEREST Recorded Nov 7, 2016
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP B.V.
Reel/Frame 040928/0001 →
RELEASE OF SECURITY INTEREST Recorded Sep 21, 2016
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP, B.V., F/K/A FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 040925/0001 →
SUPPLEMENT TO THE SECURITY AGREEMENT Recorded Jun 16, 2016
From: FREESCALE SEMICONDUCTOR, INC.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 039138/0001 →
ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS Recorded Jan 13, 2016
From: CITIBANK, N.A.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 037518/0292 →
ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS Recorded Jan 12, 2016
From: CITIBANK, N.A.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 037486/0517 →
PATENT RELEASE Recorded Dec 21, 2015
From: CITIBANK, N.A., AS COLLATERAL AGENT
To: FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 037354/0225 →
PATENT RELEASE Recorded Dec 21, 2015
From: CITIBANK, N.A., AS COLLATERAL AGENT
To: FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 037356/0553 →
PATENT RELEASE Recorded Dec 21, 2015
From: CITIBANK, N.A., AS COLLATERAL AGENT
To: FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 037356/0143 →
SECURITY AGREEMENT Recorded Nov 6, 2013
From: FREESCALE SEMICONDUCTOR, INC.
To: CITIBANK, N.A., AS NOTES COLLATERAL AGENT
Reel/Frame 031591/0266 →
SECURITY AGREEMENT Recorded Jun 18, 2013
From: FREESCALE SEMICONDUCTOR, INC.
To: CITIBANK, N.A., AS NOTES COLLATERAL AGENT
Reel/Frame 030633/0424 →
SECURITY AGREEMENT Recorded May 13, 2010
From: FREESCALE SEMICONDUCTOR, INC.
To: CITIBANK, N.A., AS COLLATERAL AGENT
Reel/Frame 024397/0001 →
SECURITY AGREEMENT Recorded Mar 15, 2010
From: FREESCALE SEMICONDUCTOR, INC.
To: CITIBANK, N.A.
Reel/Frame 024085/0001 →
SECURITY AGREEMENT Recorded Feb 2, 2007
From: FREESCALE SEMICONDUCTOR, INC.; FREESCALE ACQUISITION CORPORATION; FREESCALE ACQUISITION HOLDINGS CORP.; FREESCALE HOLDINGS (BERMUDA) III, LTD.
To: CITIBANK, N.A. AS COLLATERAL AGENT
Reel/Frame 018855/0129 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 10, 2006
From: TRAYLOR, KEVIN B.; MEADOR, RICHARD B.; NORRIS, GEORGE B.; PECKHAM, DAVID S.
To: FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 018096/0836 →