Reinforced bond pad for a semiconductor device
View Patent ↗Disclosed herein are novel support structures for pad reinforcement in conjunction with new bond pad designs for semiconductor devices. The new bond pad designs avoid the problems associated with probe testing by providing a probe region that is separate from a wire bond region. Separating the probe region 212 from the wire bond region 210 and forming the bond pad 211 over active circuitry has several advantages. By separating the probe region 212 from the wire bond region 210 , the wire bond region 210 is not damaged by probe testing, allowing for more reliable wire bonds. Also, forming the bond pad 211 over active circuitry, including metal interconnect layers, allows the integrated circuit to be smaller.
1. A reinforced bond pad configuration formed on a semiconductor device, said configuration comprising
a first outer positioned passivation layer formed on the device comprising at least one opening formed therein having a periphery;
at least two metal layers formed on the device subjacent to the first outer positioned passivation layer wherein the at least one opening formed exposes a top surface of a top metal layer thereby forming a metal pad;
a first insulating layer interposed between the at least two metal layers;
a plurality of metal features formed within the insulating layer between the at least two metal layers of the device, a portion of which are disposed within a cross-sectional area of the device defined by said opening periphery so as to reinforce said metal pad; and
a bond pad formed over and in contact with said metal pad, said bond pad comprising a probe region and a wire bond region, wherein said wire bond region substantially covers said metal pad, and wherein said wire bond region and said probe region are separated by a separating region form from the first passivation layer that is coplanar with at least one of said wire bond region and said probe region.
2. The reinforced bond pad configuration of claim 1 wherein said probe region and said wire bond region are coplanar and contiguous.
3. The reinforced bond pad configuration of claim 1 , wherein probe region is supported by a floating metal region subjacent to said probe region.
4. The reinforced bond pad configuration of claim 1 , wherein said probe region is supported by an interconnected metal pad subjacent to said probe region.
5. A reinforced bond pad configuration formed on a semiconductor device, said configuration comprising:
a first outer positioned passivation layer formed on the device comprising at least one opening formed therein having a periphery;
at least two metal layers formed on the device subadjacent to the first outer positioned passivation layer wherein the at least one opening formed exposes a top surface of a top metal layer thereby forming a metal pad;
a first insulating layer interposed between the at least two metal layers;
a plurality of metal features formed within the insulating layer between the at least two metal layers of the device, a portion of which are disposed within a cross-sectional area of the device defined by said opening periphery so as to reinforce said metal pad; and
a bond pad formed over and in contact with said metal pad, said bond pad comprising a probe region and a wire bond region wherein said wire bond region substantially covers said metal pad, and wherein said wire bond region and said probe region are separated by a separating region formed from said first passivation layer that is coplanar with said wire bond region and said probe region.
6. A reinforced bond pad configuration formed on a semiconductor device, said configuration comprising:
a first outer positioned passivation layer formed on the device comprising at least one opening formed therein having a periphery;
at least two metal layers formed on the device subadjacent to the first outer positioned passivation layer wherein the at least one opening formed exposes a top surface of a top metal layer thereby forming a metal pad;
a first insulating layer interposed between the at least two metal layers, wherein said at least two metal layers comprises three metal layers with said first insulating layer interposed between a bottom metal layer and middle metal layer of said three metal layers and a second insulating layer interposed between said middle metal layer and a top metal layer of said three metal layers so as to form a 3/2 structure;
a plurality of metal features formed within the insulating layer between the at least two metal layers of the device, a portion of which are disposed within a cross-sectional area of the device defined by said opening periphery so as to reinforce said metal pad; and
a bond pad formed over and in contact with said metal ad said bond pad comprising a probe region and a wire bond region, wherein said wire bond region substantially covers said metal pad.
7. A reinforced bond configuration formed on a semiconductor device, said configuration comprising:
a first outer positioned passivation layer formed on the device comprising at least one opening formed therein having a periphery;
at least two metal layers formed on the device subadjacent to the first outer positioned passivation layer wherein the at least one opening formed exposes a top surface of a top metal layer thereby forming a metal pad;
a first insulating layer interposed between the at least two metal layers;
a plurality of metal features formed within the insulating layer between the at least two metal layers of the device, a portion of which are disposed within a cross-sectional area of the device defined by said opening periphery so as to reinforce said metal pad; and
a bond pad formed over and in contact with said metal pad, said bond pad comprising a probe region and a wire bond region, wherein said wire bond region substantially covers said metal pad, and wherein said wire bond region and said probe region are separated by a separating region formed from said first passivation layer that is coplanar and contiguous with said wire bond region and said probe region.