IP Library Granted Patent US 7,362,147
Granted Patent B2
US 7,362,147 · App. 11/450,299 · Granted Apr 22, 2008

Integrated circuit

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Quick Facts
Patent No.
US 7,362,147
App. No.
11/450,299
Granted
Apr 22, 2008
Kind
B2
Abstract

An integrated circuit is disclosed that includes a MOS output stage transistor, a gate terminal for applying a drive signal, which controls the turning on and off of the output stage transistor, a charge transistor, which when the output stage transistor is turned on supplies a gate electrode of the output stage transistor with a charging current, and a discharge transistor, which when the output stage transistor is turned off supplies the gate electrode of the output stage transistor with a discharge current. Also, a turn-off control unit is disclosed, which when the output stage transistor is turned off supplies the gate electrode with an additional discharge current during a second time interval and turns off the additional discharge current after the second time interval.

Claims (37)

1. An integrated circuit comprising:

an output stage transistor having a gate electrode;

a gate terminal for applying a drive signal to control a turning on and off of the output stage transistor;

a charge transistor, which, when the output stage transistor is turned on, supplies the gate electrode of the output stage transistor with a charging current;

a discharge transistor, which, when the output stage transistor is turned off, supplies the gate electrode of the output stage transistor with a discharge current; and

a turn-off control unit, which, when the output stage transistor is turned off, supplies the gate electrode with an additional discharge current during a first time interval and turns off the additional discharge current after the first time interval, the turn-off control unit comprising:

a voltage determination unit for determining a voltage at the drain electrode of the output stage transistor, the voltage determination unit emitting a drain voltage signal on the basis of the voltage present at the drain electrode of the output stage transistor;

a turn-off control logic unit, which receives the drive signal and the drain voltage signal and on the basis thereof generates a discharge current control signal;

a transmission gate that is driven by the discharge current control signal; and

a bipolar fast-discharge transistor, whereby the transmission gate is looped in series with the collector-emitter section of the fast-discharge transistor between the gate electrode of the output stage transistor and a reference potential or ground.

2. The integrated circuit according to claim 1 , wherein a turn-on control unit, which, when the output stage transistor is turned on, supplies the gate electrode with an additional charging current during a second time interval and turns off the additional charging current after the second time interval.

3. The integrated circuit according to claim 2 , wherein the turn-on control unit comprises:

a switching state determination unit for determining a switching state of the output stage transistor, the switching state determination unit emitting a switching state signal dependent on the switching state of the output stage transistor;

a turn-on control logic unit, which receives the drive signal and the switching state signal and depending thereon generates a charging current control signal; and

a fast-charge transistor, which is driven by the charging current control signal, for providing the additional charging current, the fast-charge transistor being looped between a supply voltage and the gate electrode of the output stage transistor.

4. The integrated circuit according to claim 3 , wherein the switching state determination unit comprises:

a first sensor transistor whose gate electrode is connected to the gate electrode of the output stage transistor; and

a first sensor current source being looped in series with the drain-source section of the first sensor transistor between the supply voltage and a reference potential or ground, wherein the switching state signal is present at the drain electrode of the first sensor transistor (T 2 ).

5. The integrated circuit according to claim 1 , wherein the voltage determination unit comprises:

a second sensor transistor, whose gate electrode is connected to the supply voltage; and

a second sensor current source, whereby the drain-source section of the second sensor transistor and the second sensor current source are looped in series between the drain electrode of the output stage transistor and a reference potential or ground, and the drain voltage signal is present at the source electrode of the second sensor transistor.

6. The integrated circuit according to claim 1 , wherein the turn-off control unit comprises:

a fast-discharge release transistor;

a fast-discharge release transistor drive unit for driving the fast-discharge release transistor, which receives a voltage present at the base electrode of the fast-discharge transistor and as a function thereof switches on or blocks the fast-discharge release transistor; and

a fast-discharge current source, wherein a drain-source section of the fast-discharge release transistor and the fast-discharge current source are looped in series between the base electrode of the fast-discharge transistor and a reference potential or ground.

7. The integrated circuit according to claim 1 , wherein the turn-off control unit comprises:

an integration capacitor; and

an integration current source, wherein an integration capacitor and an integration current source are looped in series between the drain voltage signal and a reference potential or around, and a connecting node between the integration capacitor and the integration current source is connected to the base electrode of the fast-discharge transistor.

8. The integrated circuit according to claim 1 , further comprising:

a pull-down resistor, which is looped between the gate electrode of the output stage transistor and a reference potential or ground; and

a compensation unit that compensates for a current, caused by the pull down resistor, from the gate electrode to the reference potential.

9. The integrated circuit according to claim 8 , wherein the compensation unit comprises:

a sensor resistor, whose electrical properties coincide substantially with the electrical properties of the pull-down resistor;

a voltage follower unit, which taps off the voltage present at the pull-down resistor in a high-impedance manner and applies it to the sensor resistor in a low-impedance manner;

a current measuring unit, which measures the current flowing through the sensor resistor; and

a controlled compensation current source for supplying a compensation current to the gate electrode of the output stage transistor.

10. The integrated circuit according to claim 1 , wherein the output stage transistor is a MOS output stage transistor.

Assignments (11)
RELEASE OF SECURITY INTEREST Recorded Mar 9, 2022
From: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS NOTES COLLATERAL AGENT
To: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
Reel/Frame 059358/0001 →
RELEASE OF SECURITY INTEREST Recorded Feb 28, 2022
From: JPMORGAN CHASE BANK, N.A., AS ADMINISTRATIVE AGENT
To: ATMEL CORPORATION
Reel/Frame 059262/0105 →
RELEASE OF SECURITY INTEREST Recorded Feb 25, 2022
From: JPMORGAN CHASE BANK, N.A., AS ADMINISTRATIVE AGENT
To: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
Reel/Frame 059333/0222 →
SECURITY INTEREST Recorded Sep 18, 2018
From: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
To: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS NOTES COLLATERAL AGENT
Reel/Frame 047103/0206 →
SECURITY INTEREST Recorded Jun 25, 2018
From: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
To: JPMORGAN CHASE BANK, N.A., AS ADMINISTRATIVE AGENT
Reel/Frame 046426/0001 →
SECURITY INTEREST Recorded Feb 10, 2017
From: ATMEL CORPORATION
To: JPMORGAN CHASE BANK, N.A., AS ADMINISTRATIVE AGENT
Reel/Frame 041715/0747 →
TERMINATION AND RELEASE OF SECURITY INTEREST IN PATENT COLLATERAL Recorded Apr 7, 2016
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: ATMEL CORPORATION
Reel/Frame 038376/0001 →
PATENT SECURITY AGREEMENT Recorded Jan 3, 2014
From: ATMEL CORPORATION
To: MORGAN STANLEY SENIOR FUNDING, INC. AS ADMINISTRATIVE AGENT
Reel/Frame 031912/0173 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 29, 2012
From: ATMEL GERMANY GMBH
To: ATMEL AUTOMOTIVE GMBH
Reel/Frame 027951/0906 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 4, 2011
From: ATMEL AUTOMOTIVE GMBH
To: ATMEL CORPORATION
Reel/Frame 025899/0710 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 28, 2006
From: REBHOLZ-GOLDMANN, PETER
To: ATMEL GERMANY GMBH
Reel/Frame 018034/0477 →