IP Library › Assignment 059333/0222

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LID COVER SPRING DESIGN

App. No. 15/967,605

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SCHEDULED NETWORK SETUP TEST METHOD AND SYSTEM

App. No. 15/949,096

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OVER-CURRENT PROTECTION APPARATUS AND METHOD

App. No. 15/866,508

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VOLTAGE SENSING MECHANISM TO MINIMIZE SHORT-TO-GROUND CURRENT FOR LOW DROP-OUT AND BYPASS MODE REGULATORS

App. No. 15/867,335

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High Speed Sensing For Advanced Nanometer Flash Memory Device

App. No. 15/792,590

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DUAL LEVEL CURRENT LIMIT APPARATUS AND METHOD

App. No. 15/789,975

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Network Traffic Controller (NTC)

App. No. 15/786,224

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VIRTUAL HYBRID FOR FULL DUPLEX TRANSMISSION

App. No. 15/784,981

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ANGULAR POSITION SENSOR AND ASSOCIATED METHOD OF USE

App. No. 15/722,386

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Selectable Programmable Gain Or Operational Amplifier

App. No. 15/723,142

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HIGH SPEED AND LOW POWER SENSE AMPLIFIER

App. No. 15/706,586

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NON-VOLATILE SPLIT GATE MEMORY CELLS WITH INTEGRATED HIGH K METAL GATE LOGIC DEVICE AND METAL-FREE ERASE GATE, AND METHOD OF MAKING SAME

App. No. 15/701,357

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SENSE AMPLIFIER WITH BIT LINE PRE-CHARGE CIRCUIT FOR READING FLASH MEMORY CELLS IN AN ARRAY

App. No. 15/690,159

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DYNAMIC PROGRAMMING OF ADVANCED NANOMETER FLASH MEMORY

App. No. 15/687,191

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SEMICONDUCTOR DEVICE WITH IMPROVED FIELD LAYER

App. No. 62/547,901

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Low Cost Cryptographic Accelerator

App. No. 15/679,134

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Three-Dimensional Flash NOR Memory System With Configurable Pins

App. No. 15/660,552

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ANGULAR ROTATION SENSOR SYSTEM

App. No. 15/658,412

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Channel Estimation In OFDM Communication Systems

App. No. 15/642,348

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Digital Compensation Of IQ Coupling In Communication Receivers

App. No. 15/642,347

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MULTI-MODE LOW CURRENT DUAL VOLTAGE SELF-REGULATED LCD PUMP SYSTEM

App. No. 15/621,786

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POWER SEQUENCING FOR EMBEDDED FLASH MEMORY DEVICES

App. No. 15/610,612

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RESISTIVE RANDOM ACCESS MEMORY (RRAM) CELL FILAMENT FORMATION USING CURRENT WAVEFORMS

App. No. 15/597,709

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Method Of Forming Low Height Split Gate Memory Cells

App. No. 15/594,883

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Deep Learning Neural Network Classifier Using Non-volatile Memory Array

App. No. 15/594,439

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Array of Three-Gate Flash Memory Cells With Individual Memory Cell Read, Program and Erase

App. No. 15/593,231

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Seamless Switching Control For Low Power Battery Backup System

App. No. 15/495,079

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Method Of Making Split Gate Non-volatile Flash Memory Cell

App. No. 15/494,499

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REFERENCE VOLTAGE CIRCUITS IN MICROCONTROLLER SYSTEMS

App. No. 15/490,387

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Method Of Integrating FINFET CMOS Devices With Embedded Nonvolatile Memory Cells

App. No. 15/489,548

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Power-Up Based Integrated Circuit Configuration

App. No. 15/485,065

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Microcontroller With Digital Delay Line Analog-to-Digital Converters And Digital Comparators

App. No. 15/484,987

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Time-Based Delay Line Analog-to-Digital Converter With Variable Resolution

App. No. 15/485,020

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Time-Based Delay Line Analog to Digital Converter

App. No. 15/484,949

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ASYMMETRIC CROSS-CONNECT SYSTEM

App. No. 15/480,804

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Flat No-Leads Package With Improved Contact Pins

App. No. 15/480,661

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MULTIPLE LED STRING DIMMING CONTROL

App. No. 15/481,172

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METHOD AND APPARATUS FOR CONFIGURING ARRAY COLUMNS AND ROWS FOR ACCESSING FLASH MEMORY CELLS

App. No. 15/479,235

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SPLIT-GATE, TWIN-BIT NON-VOLATILE MEMORY CELL

App. No. 15/476,663

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Method Of Forming Pairs Of Three-Gate Non-volatile Flash Memory Cells Using Two Polysilicon Deposition Steps

App. No. 15/474,879

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Stacked Die Ground Shield

App. No. 15/471,889

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Reduced Size Split Gate Non-volatile Flash Memory Cell And Method Of Making Same

App. No. 15/468,541

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METHOD OF MAKING SPLIT GATE NON-VOLATILE MEMORY CELL WITH 3D FINFET STRUCTURE

App. No. 15/453,829

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DIFFERENTIAL INTERFACE FOR INTER-DEVICE COMMUNICATION IN A BATTERY MANAGEMENT AND PROTECTION SYSTEM

App. No. 15/438,310

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CURRENT CONTROL CIRCUIT FOR LINEAR LED DRIVER

App. No. 15/437,081

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Edgeless Single-Layer Touch Sensor

App. No. 15/419,737

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Applying a Signal to a Touch Sensor

App. No. 15/419,745

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CENTRALIZED PERIPHERAL ACCESS PROTECTION

App. No. 15/412,198

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Multi-Step Voltage For Forming Resistive Random Access Memory (RRAM) Cell Filament

App. No. 15/404,087

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Capacitive Sensing

App. No. 15/388,774

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Method and Apparatus for Providing USB Power Delivery Negotiated Through A Dedicated Transmission Channel

App. No. 15/387,382

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SECURITY EXTENSIONS FOR NON-VOLATILE MEMORY

App. No. 15/385,810

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Method for Switching Master/Slave Timing in a 1000B-T Link without Traffic Disruption

App. No. 15/375,226

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METHOD OF FORMING A POLYSILICON SIDEWALL OXIDE REGION IN A MEMORY CELL

App. No. 15/375,094

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FLASH MEMORY ARRAY WITH INDIVIDUAL MEMORY CELL READ, PROGRAM AND ERASE

App. No. 15/374,588

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SPI Interface With Slave-Select Fault Detection And Status Signal

App. No. 15/373,391

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SPI Interface With Automatic Slave Select Generation

App. No. 15/373,219

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Low Power Sense Amplifier For A Flash Memory System

App. No. 15/371,496

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STEPPER TRAJECTORY DRIVER WITH NUMERICAL CONTROLLED OSCILLATORS OPERATED AT FREQUENCY PROVIDED BY A SYNCHRONIZED CLOCK SIGNAL

App. No. 15/370,971

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MICROCONTROLLER INPUT/OUTPUT CONNECTOR STATE RETENTION IN LOW-POWER MODES

App. No. 15/368,808

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Method Of Manufacturing A Non-volatile Memory Cell And Array Having A Trapping Charge Layer In A Trench

App. No. 15/368,451

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PERMITTING COEXISTENCE OF DATA TRANSFER OF INTERFERRING WIRELESS SIGNALS

App. No. 15/365,604

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Flash Memory System Using Complementary Voltage Supplies

App. No. 15/361,473

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Reticle Rack System

App. No. 15/355,289

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Touch Sensor Signal Integration

App. No. 15/355,544

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TOUCH SENSOR SIGNAL INTEGRATION

App. No. 15/355,383

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CONVERTER WITH HYSTERETIC CONTROL

App. No. 15/346,820

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SINGLE-WIRE COMMUNICATIONS USING ITERATIVE BAUD LEARNING

App. No. 15/345,083

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BREAKING CODE EXECUTION BASED ON TIME CONSUMPTION

App. No. 15/343,666

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CHANGING THE DETECTION RANGE OF A TOUCH SENSOR

App. No. 15/342,483

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METHOD AND APPARATUS FOR SAS OPEN ADDRESS FRAME PROCESSING IN SAS EXPANDERS

App. No. 15/297,625

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TOUCH SENSOR

App. No. 15/294,922

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Split Gate Non-volatile Flash Memory Cell Having Metal Gates And Method Of Making Same

App. No. 15/295,022

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COAXIAL DATA COMMUNICATION WITH REDUCED EMI

App. No. 15/295,730

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Integration Of Metal Floating Gate In Non-Volatile Memory

App. No. 15/294,174

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MEMORY EMULATION MECHANISM

App. No. 15/294,413

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METHOD OF FORMING FLASH MEMORY WITH SEPARATE WORDLINE AND ERASE GATES

App. No. 15/290,960

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SELF-ALIGNED SOURCE FOR SPLIT-GATE NON-VOLATILE MEMORY CELL

App. No. 15/287,672

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Linear Hall Effect Sensors For Multi-Phase Permanent Magnet Motors With PWM Drive

App. No. 15/278,291

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Inter-Process Signaling System and Method

App. No. 15/277,971

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RIPPLE REDUCTION CIRCUIT FOR SEQUENTIAL LINEAR LED DRIVERS

App. No. 15/277,566

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COMMUTATION CIRCUIT FOR SEQUENTIAL LINEAR LED DRIVERS

App. No. 15/276,253

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Three-Dimensional Flash Memory System

App. No. 15/272,417

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COMBINED POWER SUPPLY AND INPUT/OUTPUT SYSTEM WITH BOOST CAPABILITY

App. No. 15/268,113

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SYSTEM BUS TRANSACTION QUEUE REALLOCATION

App. No. 15/265,057

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METHOD OF FORMING MEMORY ARRAY AND LOGIC DEVICES

App. No. 15/264,457

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Flat No-Leads Package With Improved Contact Pins

App. No. 15/263,030

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SIDEWALL-TYPE MEMORY CELL

App. No. 15/262,923

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SENSE AMPLIFIER

App. No. 15/262,805

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PULSE WIDTH MODULATION CONTROLLER ARCHITECTURES

App. No. 15/260,246

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Array Of Non-volatile Memory Cells With ROM Cells

App. No. 15/258,069

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Single-Layer Touch Sensor

App. No. 15/256,188

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COMPACT ELECTROSTATIC DISCHARGE (ESD) PROTECTION STRUCTURE

App. No. 15/250,855

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Method of Programming a Continuous-Channel Flash Memory Device

App. No. 15/249,306

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Power Driven Optimization For Flash Memory

App. No. 15/244,947

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Power Converter With Sleep/Wake Mode

App. No. 15/241,993

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Single-Wafer Real-Time Etch Rate and Uniformity Predictor For Plasma Etch Processes

App. No. 15/242,051

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USB ON THE GO (OTG) MULTI-HUB ENDPOINT REFLECTOR HUB

App. No. 15/241,756

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SELF-SETTING/RESETTING LATCH

App. No. 15/240,983

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Method And Apparatus For Configuring Array Columns And Rows For Accessing Flash Memory Cells

App. No. 15/238,681

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