Digital compensation of IQ coupling in communication receivers
A receiver circuit includes a conversion circuit configured to down-convert a received radio-frequency signal to a baseband signal, an analog-to-digital converter configured to sample the baseband signal into a sampled signal, a Fast Fourier transform (FFT) circuit configured to perform an FFT on the sampled signal, and a digital compensation circuit configured to compensate for IQ distortion in a frequency domain.
1. A receiver circuit, comprising:
a conversion circuit configured to down-convert a received radio-frequency signal to a baseband signal;
an analog-to-digital converter configured to sample the baseband signal into a sampled complex time-domain signal;
and
a digital compensation circuit configured to compensate for in-phase and quadrature-phase (IQ) distortion in a frequency domain, wherein:
in a first branch:
the digital compensation circuit is further configured to multiply using a first multiplier circuit, the sampled complex time-domain signal by a first correction for carrier frequency offset to generate a first multiplied signal;
perform a first Fast Fourier transform (FFT) on the first multiplied signal through a first FFT circuit; and
the digital compensation circuit is further configured to multiply using a second multiplier circuit, a result from the first FFT with a first factor to form a first output data;
in a second branch:
the digital compensation circuit is further configured to multiply using a third multiplier circuit, a complex baseband the sampled complex time-domain signal by a second correction for carrier frequency offset to generate a second multiplied signal;
perform a second FFT on the second multiplied signal through a second FFT circuit;
perform using an inversion and conjugation circuit, conjugation by inverting and conjugating an output of the second FFT; and
the digital compensation circuit is further configured to multiply using a fourth multiplier circuit, the inverted and conjugated output of the second FFT with a second factor to form a second output data;
wherein, the first factor is λ 1 (ω)/δ and the second factor is λ 2 (ω)/δ, wherein
λ
1
(
ω
)
=
[
1
+
ω
+
Δω
2
(
β
1
-
β
2
)
]
,
λ
2
(
ω
)
=
[
-
ω
+
Δω
2
(
β
1
-
β
2
)
]
,
δ
=
λ
1
(
ω
)
λ
1
(
-
ω
-
2
Δω
)
-
λ
2
(
ω
)
λ
2
(
-
ω
-
2
Δω
)
,
and wherein ωΔ corresponds to a frequency offset, co corresponds to a frequency, Ts is a sampling period, and β 1 and β 2 are coupling coefficients; and
the digital compensation circuit is further configured to add, by a summer circuit, the first output data and the second output data.
2. The receiver circuit of claim 1 , wherein the first correction and the second correction are dependent upon frequency.
3. The receiver circuit of claim 1 , further comprising an equalizer circuit configured to equalize a sum of the first output data and the second output data.
4. The receiver circuit of claim 1 , wherein the first correction is e −Δω c nT s , and the second correction is e Δω c nT s , wherein Δω c corresponds to a frequency offset, n is a sample index, and Ts is a sampling period.
5. The receiver circuit of claim 1 , wherein the digital compensation circuit is configured to compensate for IQ distortion arising from IQ coupling after down-conversion.
6. The receiver circuit of claim 1 , wherein the radio-frequency signal includes orthogonal-frequency-domain multiplexing (OFDM) packets.
7. A system, comprising:
a conversion circuit configured to down-convert a received radio-frequency signal to a baseband signal;
an analog-to-digital converter configured to sample the baseband signal into a sampled complex time-domain signal;
and
a digital compensation circuit configured to compensate for in-phase and quadrature-phase (IQ) distortion in a frequency domain, wherein:
in a first branch:
the digital compensation circuit is further configured to multiply using a first multiplier circuit, the sampled complex time-domain signal by a first correction for carrier frequency offset to generate a first multiplied signal;
perform a first Fast Fourier transform (FFT) on the first multiplied signal through a first FFT circuit; and
the digital compensation circuit is further configured to multiply using a second multiplier circuit, a result from the first FFT with a first factor to form a first output data;
in a second branch:
the digital compensation circuit is further configured to multiply using a third multiplier circuit, a complex baseband the sampled complex time-domain signal by a second correction for carrier frequency offset to generate a second multiplied signal;
perform a second FFT on the second multiplied signal through a second FFT circuit;
perform using an inversion and conjugation circuit, conjugation by inverting and conjugating an output of the second FFT; and
the digital compensation circuit is further configured to multiply using a fourth multiplier circuit, the inverted and conjugated output of the second FFT with a second factor to form a second output data;
wherein, the first factor is λ 1 (ω) /δ and the second factor is λ 2 (ω)/δ, wherein
λ
1
(
ω
)
=
[
1
+
ω
+
Δω
2
(
β
1
-
β
2
)
]
,
λ
2
(
ω
)
=
[
-
ω
+
Δω
2
(
β
1
-
β
2
)
]
,
δ
=
λ
1
(
ω
)
λ
1
(
-
ω
-
2
Δω
)
-
λ
2
(
ω
)
λ
2
(
-
ω
-
2
Δω
)
,
and wherein ωΔ corresponds to a frequency offset, ω corresponds to a frequency, Ts is a sampling period, and β 1 and β 2 are coupling coefficients; and
the digital compensation circuit is further configured to add, by a summer circuit, the first output data and the second output data.
8. The system of claim 7 , wherein the first correction and the second correction are dependent upon frequency.
9. The system of claim 7 , further comprising an equalizer circuit configured to equalize a sum of the first output data and the second output data.
10. The system of circuit of claim 7 , wherein the first correction is e −Δω c nT s , and the second correction is e Δω c nT s , wherein Δω c corresponds to a frequency offset, n is a sample index, and Ts is a sampling period.
11. The system of claim 7 , wherein the digital compensation circuit is configured to compensate for IQ distortion arising from IQ coupling after down-conversion.
12. The system of claim 7 , wherein the radio-frequency signal includes orthogonal-frequency-domain multiplexing (OFDM) packets.