Patent Assignment
Reel/Frame 047103/0206
SECURITY INTEREST
Recorded: 2018-09-18
Received: 2018-09-18
Pages: 335
Assignors
ATMEL CORPORATION
Executed: 2018-09-14
MICROCHIP TECHNOLOGY INCORPORATED
Executed: 2018-09-14
MICROSEMI CORPORATION
Executed: 2018-09-14
MICROSEMI STORAGE SOLUTIONS, INC.
Executed: 2018-09-14
SILICON STORAGE TECHNOLOGY, INC.
Executed: 2018-09-14
Assignee
WELLS FARGO BANK, NATIONAL ASSOCIATION, AS NOTES COLLATERAL AGENT
333 S. GRAND AVENUE, 5TH FLOOR SUITE 5A, LOS ANGELES, CA, 90071, UNITED STATES
Covered Applications
(100)
LID COVER SPRING DESIGN
App. No. 15/967,605
→
SCHEDULED NETWORK SETUP TEST METHOD AND SYSTEM
App. No. 15/949,096
→
OVER-CURRENT PROTECTION APPARATUS AND METHOD
App. No. 15/866,508
→
VOLTAGE SENSING MECHANISM TO MINIMIZE SHORT-TO-GROUND CURRENT FOR LOW DROP-OUT AND BYPASS MODE REGULATORS
App. No. 15/867,335
→
High Speed Sensing For Advanced Nanometer Flash Memory Device
App. No. 15/792,590
→
DUAL LEVEL CURRENT LIMIT APPARATUS AND METHOD
App. No. 15/789,975
→
Network Traffic Controller (NTC)
App. No. 15/786,224
→
VIRTUAL HYBRID FOR FULL DUPLEX TRANSMISSION
App. No. 15/784,981
→
ANGULAR POSITION SENSOR AND ASSOCIATED METHOD OF USE
App. No. 15/722,386
→
Selectable Programmable Gain Or Operational Amplifier
App. No. 15/723,142
→
HIGH SPEED AND LOW POWER SENSE AMPLIFIER
App. No. 15/706,586
→
NON-VOLATILE SPLIT GATE MEMORY CELLS WITH INTEGRATED HIGH K METAL GATE LOGIC DEVICE AND METAL-FREE ERASE GATE, AND METHOD OF MAKING SAME
App. No. 15/701,357
→
SENSE AMPLIFIER WITH BIT LINE PRE-CHARGE CIRCUIT FOR READING FLASH MEMORY CELLS IN AN ARRAY
App. No. 15/690,159
→
DYNAMIC PROGRAMMING OF ADVANCED NANOMETER FLASH MEMORY
App. No. 15/687,191
→
SEMICONDUCTOR DEVICE WITH IMPROVED FIELD LAYER
App. No. 62/547,901
→
Low Cost Cryptographic Accelerator
App. No. 15/679,134
→
Three-Dimensional Flash NOR Memory System With Configurable Pins
App. No. 15/660,552
→
ANGULAR ROTATION SENSOR SYSTEM
App. No. 15/658,412
→
Channel Estimation In OFDM Communication Systems
App. No. 15/642,348
→
Digital Compensation Of IQ Coupling In Communication Receivers
App. No. 15/642,347
→
MULTI-MODE LOW CURRENT DUAL VOLTAGE SELF-REGULATED LCD PUMP SYSTEM
App. No. 15/621,786
→
POWER SEQUENCING FOR EMBEDDED FLASH MEMORY DEVICES
App. No. 15/610,612
→
RESISTIVE RANDOM ACCESS MEMORY (RRAM) CELL FILAMENT FORMATION USING CURRENT WAVEFORMS
App. No. 15/597,709
→
Method Of Forming Low Height Split Gate Memory Cells
App. No. 15/594,883
→
Deep Learning Neural Network Classifier Using Non-volatile Memory Array
App. No. 15/594,439
→
Array of Three-Gate Flash Memory Cells With Individual Memory Cell Read, Program and Erase
App. No. 15/593,231
→
Seamless Switching Control For Low Power Battery Backup System
App. No. 15/495,079
→
Method Of Making Split Gate Non-volatile Flash Memory Cell
App. No. 15/494,499
→
REFERENCE VOLTAGE CIRCUITS IN MICROCONTROLLER SYSTEMS
App. No. 15/490,387
→
Method Of Integrating FINFET CMOS Devices With Embedded Nonvolatile Memory Cells
App. No. 15/489,548
→
Power-Up Based Integrated Circuit Configuration
App. No. 15/485,065
→
Microcontroller With Digital Delay Line Analog-to-Digital Converters And Digital Comparators
App. No. 15/484,987
→
Time-Based Delay Line Analog-to-Digital Converter With Variable Resolution
App. No. 15/485,020
→
Time-Based Delay Line Analog to Digital Converter
App. No. 15/484,949
→
ASYMMETRIC CROSS-CONNECT SYSTEM
App. No. 15/480,804
→
MULTIPLE LED STRING DIMMING CONTROL
App. No. 15/481,172
→
Flat No-Leads Package With Improved Contact Pins
App. No. 15/480,661
→
METHOD AND APPARATUS FOR CONFIGURING ARRAY COLUMNS AND ROWS FOR ACCESSING FLASH MEMORY CELLS
App. No. 15/479,235
→
SPLIT-GATE, TWIN-BIT NON-VOLATILE MEMORY CELL
App. No. 15/476,663
→
Method Of Forming Pairs Of Three-Gate Non-volatile Flash Memory Cells Using Two Polysilicon Deposition Steps
App. No. 15/474,879
→
Stacked Die Ground Shield
App. No. 15/471,889
→
Reduced Size Split Gate Non-volatile Flash Memory Cell And Method Of Making Same
App. No. 15/468,541
→
METHOD OF MAKING SPLIT GATE NON-VOLATILE MEMORY CELL WITH 3D FINFET STRUCTURE
App. No. 15/453,829
→
DIFFERENTIAL INTERFACE FOR INTER-DEVICE COMMUNICATION IN A BATTERY MANAGEMENT AND PROTECTION SYSTEM
App. No. 15/438,310
→
CURRENT CONTROL CIRCUIT FOR LINEAR LED DRIVER
App. No. 15/437,081
→
Edgeless Single-Layer Touch Sensor
App. No. 15/419,737
→
Applying a Signal to a Touch Sensor
App. No. 15/419,745
→
CENTRALIZED PERIPHERAL ACCESS PROTECTION
App. No. 15/412,198
→
Multi-Step Voltage For Forming Resistive Random Access Memory (RRAM) Cell Filament
App. No. 15/404,087
→
Capacitive Sensing
App. No. 15/388,774
→
Method and Apparatus for Providing USB Power Delivery Negotiated Through A Dedicated Transmission Channel
App. No. 15/387,382
→
SECURITY EXTENSIONS FOR NON-VOLATILE MEMORY
App. No. 15/385,810
→
Method for Switching Master/Slave Timing in a 1000B-T Link without Traffic Disruption
App. No. 15/375,226
→
METHOD OF FORMING A POLYSILICON SIDEWALL OXIDE REGION IN A MEMORY CELL
App. No. 15/375,094
→
FLASH MEMORY ARRAY WITH INDIVIDUAL MEMORY CELL READ, PROGRAM AND ERASE
App. No. 15/374,588
→
SPI Interface With Slave-Select Fault Detection And Status Signal
App. No. 15/373,391
→
SPI Interface With Automatic Slave Select Generation
App. No. 15/373,219
→
Low Power Sense Amplifier For A Flash Memory System
App. No. 15/371,496
→
STEPPER TRAJECTORY DRIVER WITH NUMERICAL CONTROLLED OSCILLATORS OPERATED AT FREQUENCY PROVIDED BY A SYNCHRONIZED CLOCK SIGNAL
App. No. 15/370,971
→
MICROCONTROLLER INPUT/OUTPUT CONNECTOR STATE RETENTION IN LOW-POWER MODES
App. No. 15/368,808
→
Method Of Manufacturing A Non-volatile Memory Cell And Array Having A Trapping Charge Layer In A Trench
App. No. 15/368,451
→
PERMITTING COEXISTENCE OF DATA TRANSFER OF INTERFERRING WIRELESS SIGNALS
App. No. 15/365,604
→
Flash Memory System Using Complementary Voltage Supplies
App. No. 15/361,473
→
Touch Sensor Signal Integration
App. No. 15/355,544
→
TOUCH SENSOR SIGNAL INTEGRATION
App. No. 15/355,383
→
Reticle Rack System
App. No. 15/355,289
→
CONVERTER WITH HYSTERETIC CONTROL
App. No. 15/346,820
→
SINGLE-WIRE COMMUNICATIONS USING ITERATIVE BAUD LEARNING
App. No. 15/345,083
→
BREAKING CODE EXECUTION BASED ON TIME CONSUMPTION
App. No. 15/343,666
→
CHANGING THE DETECTION RANGE OF A TOUCH SENSOR
App. No. 15/342,483
→
METHOD AND APPARATUS FOR SAS OPEN ADDRESS FRAME PROCESSING IN SAS EXPANDERS
App. No. 15/297,625
→
Split Gate Non-volatile Flash Memory Cell Having Metal Gates And Method Of Making Same
App. No. 15/295,022
→
TOUCH SENSOR
App. No. 15/294,922
→
COAXIAL DATA COMMUNICATION WITH REDUCED EMI
App. No. 15/295,730
→
Integration Of Metal Floating Gate In Non-Volatile Memory
App. No. 15/294,174
→
MEMORY EMULATION MECHANISM
App. No. 15/294,413
→
METHOD OF FORMING FLASH MEMORY WITH SEPARATE WORDLINE AND ERASE GATES
App. No. 15/290,960
→
SELF-ALIGNED SOURCE FOR SPLIT-GATE NON-VOLATILE MEMORY CELL
App. No. 15/287,672
→
Linear Hall Effect Sensors For Multi-Phase Permanent Magnet Motors With PWM Drive
App. No. 15/278,291
→
Inter-Process Signaling System and Method
App. No. 15/277,971
→
RIPPLE REDUCTION CIRCUIT FOR SEQUENTIAL LINEAR LED DRIVERS
App. No. 15/277,566
→
COMMUTATION CIRCUIT FOR SEQUENTIAL LINEAR LED DRIVERS
App. No. 15/276,253
→
Three-Dimensional Flash Memory System
App. No. 15/272,417
→
COMBINED POWER SUPPLY AND INPUT/OUTPUT SYSTEM WITH BOOST CAPABILITY
App. No. 15/268,113
→
SYSTEM BUS TRANSACTION QUEUE REALLOCATION
App. No. 15/265,057
→
METHOD OF FORMING MEMORY ARRAY AND LOGIC DEVICES
App. No. 15/264,457
→
Flat No-Leads Package With Improved Contact Pins
App. No. 15/263,030
→
SENSE AMPLIFIER
App. No. 15/262,805
→
SIDEWALL-TYPE MEMORY CELL
App. No. 15/262,923
→
PULSE WIDTH MODULATION CONTROLLER ARCHITECTURES
App. No. 15/260,246
→
Array Of Non-volatile Memory Cells With ROM Cells
App. No. 15/258,069
→
Single-Layer Touch Sensor
App. No. 15/256,188
→
COMPACT ELECTROSTATIC DISCHARGE (ESD) PROTECTION STRUCTURE
App. No. 15/250,855
→
Method of Programming a Continuous-Channel Flash Memory Device
App. No. 15/249,306
→
Power Driven Optimization For Flash Memory
App. No. 15/244,947
→
USB ON THE GO (OTG) MULTI-HUB ENDPOINT REFLECTOR HUB
App. No. 15/241,756
→
Power Converter With Sleep/Wake Mode
App. No. 15/241,993
→
Single-Wafer Real-Time Etch Rate and Uniformity Predictor For Plasma Etch Processes
App. No. 15/242,051
→
SELF-SETTING/RESETTING LATCH
App. No. 15/240,983
→
Method And Apparatus For Configuring Array Columns And Rows For Accessing Flash Memory Cells
App. No. 15/238,681
→