Seamless switching control for low power battery backup system
A circuit for providing back-up power includes a switching circuit configured to be coupled to a first power source and a second power source. The circuit includes a domain voltage level monitor circuit coupled with the first power source and the second power source and with output of the switching circuit. The circuit includes a dynamic level shifter circuit coupled with the first power source and the second power source and an output of the domain voltage level monitor. The circuit includes a double controlled latch circuit coupled with the first power source and the second power source and an output of the dynamic level shifter circuit. The double controlled latch circuit is configured to provide control signals to the switching circuit.
1. A circuit for providing back-up power, comprising:
a switching circuit configured to be coupled to a first power source and a second power source;
a domain voltage level monitor circuit coupled with the first power source and the second power source and with output of the switching circuit;
a dynamic level shifter circuit coupled with the first power source and the second power source and an output of the domain voltage level monitor; and
a double controlled latch circuit coupled with the first power source and the second power source and an output of the dynamic level shifter circuit, the double controlled latch circuit configured to: provide control signals to the switching circuit;
wherein the dynamic level shifter circuit is further configured to issue a pair of signals to the double controlled latch circuit as input for the double controlled latch circuit, wherein each signal of the pair of signals is not the inverse of another signal of the pair of signals.
2. The circuit according to claim 1 , the switching circuit comprises two p-channel MOSFETs.
3. The circuit according to claim 1 , wherein the double controlled latch circuit is configured to generate complementary output signals fed to the switching circuit.
4. The circuit according to claim 1 , wherein the double controlled latch circuit is configured receive a first input signal and a second input signal from the dynamic level shifter circuit, wherein:
the first input signal is communicatively coupled to a drain of a first transistor of the double controlled latch circuit;
the first input signal is communicatively coupled to a gate of a second transistor of the double controlled latch circuit;
the second input signal is communicatively coupled to a drain of the second transistor of the double controlled latch circuit; and
the second input signal is communicatively coupled to a gate of the first transistor of the double controlled latch circuit.
5. The circuit according to claim 1 , wherein the client voltage monitor circuit is configured to inject a current to drive the dynamic level shifter circuit based upon a difference between the first power source, the second power source, and output of the switching circuit.
6. The circuit according to claim 1 , wherein the dynamic level shifter circuit is configured to create voltage drops according to a voltage received from the client voltage monitor circuit.
7. A microcontroller, comprising:
a peripheral circuit;
a switching circuit configured to be coupled to a first power source and a second power source and provide power to the peripheral circuit;
a domain voltage level monitor circuit coupled with the first power source and the second power source and with output of the switching circuit;
a dynamic level shifter circuit coupled with the first power source and the second power source and an output of the domain voltage level monitor; and
a double controlled latch circuit coupled with the first power source and the second power source and an output of the dynamic level shifter circuit, the double controlled latch circuit configured to: provide control signals to the switching circuit;
wherein the dynamic level shifter circuit is further configured to issue a pair of signals to the double controlled latch circuit as input for the double controlled latch circuit, wherein each signal of the pair of signals is not the inverse of another signal of the pair of signals.
8. The microcontroller according to claim 7 , the switching circuit comprises two p-channel MOSFETs.
9. The microcontroller according to claim 7 , wherein the double controlled latch circuit is configured to generate complementary output signals fed to the switching circuit.
10. The microcontroller according to claim 7 , wherein the double controlled latch circuit is configured receive a first input signal and a second input signal from the dynamic level shifter circuit, wherein:
the first input signal is communicatively coupled to a drain of a first transistor of the double controlled latch circuit;
the first input signal is communicatively coupled to a gate of a second transistor of the double controlled latch circuit;
the second input signal is communicatively coupled to a drain of the second transistor of the double controlled latch circuit; and
the second input signal is communicatively coupled to a gate of the first transistor of the double controlled latch circuit.
11. The microcontroller according to claim 7 , wherein the client voltage monitor circuit is configured to inject a current to drive the dynamic level shifter circuit based upon a difference between the first power source, the second power source, and output of the switching circuit.
12. The microcontroller according to claim 7 , wherein the dynamic level shifter circuit is configured to create voltage drops according to a voltage received from the client voltage monitor circuit.
13. A system comprising:
a first power source;
a second power source;
a peripheral circuit;
a switching circuit configured to be coupled to the first power source and to the second power source and provide power to the peripheral circuit;
a domain voltage level monitor circuit coupled with the first power source and the second power source and with output of the switching circuit;
a dynamic level shifter circuit coupled with the first power source and the second power source and an output of the domain voltage level monitor; and
a double controlled latch circuit coupled with the first power source and the second power source and an output of the dynamic level shifter circuit, the double controlled latch circuit configured to: provide control signals to the switching circuit;
wherein the dynamic level shifter circuit is further configured to issue a pair of signals to the double controlled latch circuit as input for the double controlled latch circuit, wherein each signal of the pair of signals is not the inverse of another signal of the pair of signals.
14. The system according to claim 13 , the switching circuit comprises two p-channel MOSFETs.
15. The system according to claim 13 , wherein the double controlled latch circuit is configured to generate complementary output signals fed to the switching circuit.
16. The system according to claim 13 , wherein the second power source is a battery.
17. The system according to claim 13 , further comprising at least one load coupled with a pin of a microcontroller of the system, wherein the pin is coupled with the output of the first and second switch.
18. The circuit according to claim 1 , wherein the dynamic level shifter circuit is further configured to issue a pair of non-complementary signals to the double controlled latch circuit as input for the double controlled latch circuit.
19. A method for providing back-up power, comprising:
coupling a switching circuit to a first power source and a second power source;
coupling a domain voltage level monitor circuit with the first power source and the second power source and with output of the switching circuit;
coupling a dynamic level shifter circuit with the first power source and the second power source and an output of the domain voltage level monitor;
coupling a double controlled latch circuit with the first power source and the second power source and an output of the dynamic level shifter circuit; and
with the double controlled latch circuit, providing control signals to the switching circuit; and
with the dynamic level shifter circuit, issuing a pair of signals to the double controlled latch circuit as input for the double controlled latch circuit, wherein each signal of the pair of signals is not the inverse of another signal of the pair of signals.
20. The method of claim 19 , further comprising generating complementary output signals to fed to the switching circuit.
21. The method of claim 19 , further comprising:
receiving, with the double controlled latch circuit, a first input signal and a second input signal from the dynamic level shifter circuit, wherein:
the first input signal is communicatively coupled to a drain of a first transistor of the double controlled latch circuit;
the first input signal is communicatively coupled to a gate of a second transistor of the double controlled latch circuit;
the second input signal is communicatively coupled to a drain of the second transistor of the double controlled latch circuit; and
the second input signal is communicatively coupled to a gate of the first transistor of the double controlled latch circuit.
22. The method of claim 19 , further comprising, with the client voltage monitor circuit, injecting a current to drive the dynamic level shifter circuit based upon a difference between the first power source, the second power source, and output of the switching circuit.
23. The method of claim 19 , further comprising, with the dynamic level shifter circuit, creating voltage drops according to a voltage received from the client voltage monitor circuit.