SPI Interface With Slave-Select Fault Detection And Status Signal
A serial peripheral interface (SPI) module includes a transceiver including a clock line, a data line and at least one slave select line. The module also includes an interface circuit configured to monitor the slave select line and assert a fault based upon an incorrect de-assertion of the slave select line.
1 . A serial peripheral interface (SPI) module, comprising:
a transceiver including a clock line, a data line and at least one slave select line; and
an interface circuit configured to monitor the slave select line and assert a fault based upon an incorrect de-assertion of the slave select line.
2 . The SPI module according to claim 1 , wherein the fault is stored in a status or control register.
3 . The SPI module according to claim 1 , further comprising a configuration register defining the number of bits per transmission.
4 . The SPI module according to claim 1 , wherein the interface circuit is further configured to assert a fault based upon a de-assertion of the slave select line before an expected number of bits is received at the module from a master module.
5 . The SPI module according to claim 1 , wherein the interface circuit is further configured to assert a fault based upon a de-assertion of the slave select line after more than an expected number of bits is received at the module from a master module.
6 . The SPI module according to claim 1 , wherein the interface circuit is further configured to assert a fault based upon a noisy slave select line.
7 . The SPI module according to claim 1 , further comprising a counter configured to store an expected number of bits.
8 . The SPI module according to claim 1 , further comprising a counter configured to store an expected number of bits, wherein the interface circuit is configured to decrement the counter upon a received bit.
9 . The SPI module according to claim 1 :
further comprising a counter configured to store an expected number of bits; and
wherein the interface circuit is configured to:
decrement the counter upon a received bit; and
assert a fault based upon a de-assertion of the slave select line when the counter is nonzero.
10 . A microcontroller, comprising:
a transceiver including a clock line, a data line and at least one slave select line; and
an interface circuit configured to monitor the slave select line and assert a fault based upon an incorrect de-assertion of the slave select line.
11 . A method for evaluating serial peripheral interface communication, comprising:
receiving data through a clock line, a data line and at least one slave select line;
monitoring the slave select line; and
asserting a fault based upon an incorrect de-assertion of the slave select line.
12 . The method according to claim 11 , further comprising storing the fault in a status or control register.
13 . The method according to claim 11 , further comprising storing, in a configuration register, the number of bits per transmission.
14 . The method according to claim 11 , further comprising asserting a fault based upon a de-assertion of the slave select line before an expected number of bits is received at the module from a master module.
15 . The method according to claim 11 , further comprising asserting a fault based upon a de-assertion of the slave select line after more than an expected number of bits is received at the module from a master module.
16 . The method according to claim 11 , further comprising asserting a fault based upon a noisy slave select line.
17 . The method according to claim 11 , further comprising storing an expected number of a bits in a counter.
18 . The method according to claim 11 , further comprising:
storing an expected number of a bits in a counter; and
decrementing the counter upon a received bit.
19 . The method according to claim 11 , further comprising:
storing an expected number of a bits in a counter;
decrementing the counter upon a received bit; and
asserting a fault based upon a de-assertion of the slave select line when the counter is nonzero.